METHOD AND STRUCTURE OF EXPANDING, UPGRADING, OR FIXING MULTI-CHIP PACKAGE

• US 20090079055A1
• Filed: 09/25/2007
• Published: 03/26/2009
• Est. Priority Date: 09/25/2007
• Status: Active Grant

• Current Assignee: Polaris Innovations Limited (Wi-LAN Inc.)
• Original Assignee: Qimonda AG (Infineon Technologies AG)
• Inventors: OH, JONG HOON, Kiehl, Oliver, Kim, Jung Pill, Ellis, Wayne Frederick, Schnell, Josef, Beldiman, Octavian, Collins, Lee Ward, Hummler, Klaus
• Granted Patent: US 7,944,047 B2
• Time in Patent Office: Days
• US Class Current: 257/686
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2225/1023 the support being an insulating substrate
• CPC Class Codes: H01L 2225/1058 Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/50 for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 25/18 the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA

Abstract

Embodiments of the present invention generally provide techniques and apparatus for altering the functionality of a multi-chip package (MCP) without requiring entire replacement of the MCP. The MCP may be designed with a top package substrate designed to interface with an add-on package that, when sensed by the MCP, alters the functionality of the MCP.

Claims

1. A system, comprising:

a multi-chip package (MCP) having a plurality of dies, a bottom package substrate for interfacing with a printed circuit board (PCB), and a top package substrate serving as an interface between the MCP and an add-on package; and

an add-on package attached to the top package substrate of the multi-chip package to alter functionality of the multi-chip package.

2. The system of claim 1, wherein the multi-chip package contains a die that is reserved for new functionality, and is activated upon attachment of the add-on package.

3. The system of claim 1, wherein the plurality of dies of the multi-chip package comprise of a plurality of dynamic random access (DRAM) memory devices.

4. The system of claim 3, wherein the add-on package comprises at least one DRAM memory device such that the combination of the add-on package and the MCP has a greater memory capacity than the MCP alone.

5. The system of claim 1, wherein the plurality of dies of the multi-chip package comprises at least one non-volatile memory device.

6. The system of claim 1, wherein the plurality of dies of the multi-chip package comprises at least one volatile memory device and at least one non-volatile memory device.

7. The system of claim 1, wherein the plurality of dies of the multi-chip package comprises at least one processor and at least one memory device.

8. A multi-chip package (MCP), comprising:

a plurality of dies;

a bottom package substrate for interfacing with a printed circuit board (PCB);

a top package substrate serving as an interface between the MCP and an add-on package; and

a sensing circuit for detecting the presence of an add-on package attached to the top package substrate of the multi-chip package to alter functionality of the multi-chip package.

9. The MCP of claim 8, wherein the plurality of dies comprises at least one die that is reserved for new functionality and is activated upon attachment of the add-on package.

10. The MCP of claim 9, wherein the die reserved for new functionality comprises a memory interface.

11. The MCP of claim 10, wherein:

the plurality of dies of the MCP comprise of a plurality of dynamic random access (DRAM) memory devices; and

the memory interface comprises a memory interface for a non-volatile memory device in the add-on package.

12. The MCP of claim 8, wherein the plurality of dies of the multi-chip package comprises at least one volatile memory device and at least one non-volatile memory device.

13. The MCP of claim 8, wherein the plurality of dies of the multi-chip package comprises at least one processor and at least one memory device.

14. A method, comprising:

sensing the attachment of an add-on package to a top package substrate of a multi-chip package (MCP); and

altering functionality of the MCP in response to sensing the attachment of the add-on package.

15. The method of claim 14, wherein altering functionality of the MCP comprises disabling one or more dies of the MCP.

16. The method of claim 15, wherein altering functionality of the MCP further comprises enabling functionality of a device on the add-on package to replace the functionality of the one or more dies of the MCP disabled.

17. The method of claim 15, wherein disabling the one or more dies comprises placing the one or more dies in a deep power down mode state.

18. The method of claim 14, further comprising:

communicating to a controller to inform new functionality is available.

19. The method of claim 18, wherein communicating to the controller is accomplished by changing jumper settings on a PCB.

20. The method of claim 18, wherein communicating to the controller is accomplished by asserting a status signal from the add-on package to the controller.