METHOD OF FORMING TRANSISTOR DEVICES WITH DIFFERENT THRESHOLD VOLTAGES USING HALO IMPLANT SHADOWING

• US 20090081860A1
• Filed: 09/26/2007
• Published: 03/26/2009
• Est. Priority Date: 09/26/2007
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: WU, David, MICHAEL, Mark, Michael, Donna, SULTAN, Akif, BULLER, James F., ZHOU, Jingrong
• Granted Patent: US 7,598,161 B2
• Time in Patent Office: Days
• US Class Current: 438/531
• CPC Class Codes: H01L 21/26513 of electrically active species
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 21/823807 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 29/1083 with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current

Abstract

The halo implant technique described herein employs a halo implant mask that creates a halo implant shadowing effect during halo dopant bombardment. A first transistor device structure and a second transistor device structure are formed on a wafer such that they are orthogonally oriented to each other. A common halo implant mask is created with features that prevent halo implantation of the diffusion region of the second transistor device structure during halo implantation of the diffusion region of the first transistor device structure, and with features that prevent halo implantation of the diffusion region of the first transistor device structure during halo implantation of the diffusion region of the second transistor device structure. The orthogonal orientation of the transistor device structures and the pattern of the halo implant mask obviates the need to create multiple implant masks to achieve different threshold voltages for the transistor device structures.

Claims

1. A halo implant method for semiconductor devices, the method comprising:

forming a first device structure on a semiconductor substrate, the first device structure comprising a first diffusion region that represents source/drain regions and a gate channel of the first device structure, and the first device structure comprising a first gate structure over the first diffusion region, the first gate structure being oriented in a first direction relative to a reference direction;

forming a second device structure on the semiconductor substrate, the second device structure comprising a second diffusion region that represents source/drain regions and a gate channel of the second device structure, and the second device structure comprising a second gate structure over the second diffusion region, the second gate structure being oriented in a second direction relative to the reference direction;

forming an implant mask that selectively masks portions of the first device structure while leaving the first diffusion region substantially exposed, and that selectively masks portions of the second device structure while leaving the second diffusion region substantially exposed;

halo implanting the first diffusion region using a first ion bombardment oriented in a first tilted direction, the implant mask shadowing the second diffusion region from the first ion bombardment; and

halo implanting the second diffusion region using a second ion bombardment oriented in a second tilted direction, the implant mask shadowing the first diffusion region from the second ion bombardment.

2. The halo implant method of claim 1, wherein the first direction and the second direction are orthogonal.

3. The halo implant method of claim 2, wherein:

the first tilted direction has a first projected direction on the semiconductor substrate;

the second tilted direction has a second projected direction on the semiconductor substrate; and

the first projected direction and the second projected direction are orthogonal.

4. The halo implant method of claim 1, further comprising:

halo implanting the first diffusion region using a third ion bombardment oriented in a third tilted direction, the implant mask shadowing the second diffusion region from the third ion bombardment; and

halo implanting the second diffusion region using a fourth ion bombardment oriented in a fourth tilted direction, the implant mask shadowing the first diffusion region from the fourth ion bombardment.

5. The halo implant method of claim 1, further comprising:

controlling the halo implanting of the first diffusion region to achieve a first threshold voltage for the first device structure; and

controlling the halo implanting of the second diffusion region to achieve a second threshold voltage for the second device structure.

6. The halo implant method of claim 1, wherein:

forming the first device structure comprises forming the first diffusion region from silicon-on-insulator; and

forming the second device structure comprises forming the second diffusion region from silicon-on-insulator.

7. A method of forming semiconductor transistor devices, the method comprising:

providing a semiconductor wafer having formed thereon a first transistor device structure comprising a first diffusion region that represents source/drain regions and a gate channel of the first transistor device structure, and a second transistor device structure comprising a second diffusion region that represents source/drain regions and a gate channel of the second transistor device structure;

forming an implant mask over selective portions of the first transistor device structure and over selective portions of the second transistor device structure, such that the first diffusion region and the source/drain regions of the first transistor device structure are fully exposed and become susceptible to halo implanting using ion bombardment oriented in a first tilted direction and immune to halo implanting using ion bombardment oriented in a second tilted direction, and such that the second diffusion region and the source/drain regions of the second transistor device structure are fully exposed and become susceptible to halo implanting using ion bombardment oriented in the second tilted direction and immune to halo implanting using ion bombardment oriented in the first tilted direction;

halo implanting the first diffusion region using ion bombardment oriented in the first tilted direction; and

halo implanting the second diffusion region using ion bombardment oriented in the second tilted direction.

8. The method of claim 7, wherein:

during halo implanting of the first diffusion region, features of the implant mask corresponding to the second transistor device structure prevent ion bombardment oriented in the first tilted direction from directly reaching the second diffusion region; and

during halo implanting of the second diffusion region, features of the implant mask corresponding to the first transistor device structure prevent ion bombardment oriented in the second tilted direction from directly reaching the first diffusion region.

9. The method of claim 7, wherein:

the first transistor device structure comprises a first gate structure over the first diffusion region, the first gate structure being oriented in a first direction relative to a reference direction; and

the second transistor device structure comprises a second gate structure over the second diffusion region, the second gate structure being oriented in a second direction relative to the reference direction.

10. The method of claim 9, wherein the first direction and the second direction are orthogonal.

11. The method of claim 10, wherein:

the first tilted direction has a first projected direction on the semiconductor wafer;

the second tilted direction has a second projected direction on the semiconductor wafer; and

the first projected direction and the second projected direction are orthogonal.

12. The method of claim 7, wherein:

during halo implanting of the first diffusion region, the ion bombardment is controlled to achieve a first threshold voltage for the first transistor device structure; and

during halo implanting of the second diffusion region, the ion bombardment is controlled to achieve a second threshold voltage for the second transistor device structure.

13. A halo implant method for a semiconductor wafer having formed thereon a first device structure comprising a first diffusion region that represents source/drain regions of the first device structure, and a second device structure comprising a second diffusion region that represents source/drain regions of the second device structure, the first device structure and the second device structure being oriented in different directions, the method comprising:

forming an implant mask over selective portions of the first device structure and over selective portions of the second device structure, such that the first diffusion region and the second diffusion region remain substantially exposed;

halo implanting the source region of the first diffusion region, without halo implanting the second diffusion region, using a first ion bombardment oriented in a first tilted direction that has a first projected direction on the semiconductor wafer, the implant mask protecting the second diffusion region from the first ion bombardment;

halo implanting the source region of the second diffusion region, without halo implanting the first diffusion region, using a second ion bombardment oriented in a second tilted direction that has a second projected direction on the semiconductor wafer, the implant mask protecting the first diffusion region from the second ion bombardment;

halo implanting the drain region of the first diffusion region, without halo implanting the second diffusion region, using a third ion bombardment oriented in a third tilted direction that has a third projected direction on the semiconductor wafer, the implant mask protecting the second diffusion region from the third ion bombardment; and

halo implanting the drain region of the second diffusion region, without halo implanting the first diffusion region, using a fourth ion bombardment oriented in a fourth tilted direction that has a fourth projected direction on the semiconductor wafer, the implant mask protecting the first diffusion region from the fourth ion bombardment;

wherein

the first projected direction and the third projected direction are anti-parallel, the second projected direction and the fourth projected direction are anti-parallel, the first projected direction is orthogonal to both the second projected direction and the fourth projected direction, and the third projected direction is orthogonal to both the second projected direction and the fourth projected direction.

16. The halo implant method of claim 13, further comprising:

controlling the halo implanting of the first diffusion region to achieve a first threshold voltage for the first device structure; and

controlling the halo implanting of the second diffusion region to achieve a second threshold voltage for the second device structure.

17. The halo implant method of claim 13, wherein forming the implant mask comprises forming the implant mask with a topography that makes the first diffusion region susceptible to halo implanting using ion bombardment oriented in the first and third tilted directions and immune to halo implanting using ion bombardment oriented in the second and fourth tilted directions, and that makes the second diffusion region susceptible to halo implanting using ion bombardment oriented in the second and fourth tilted directions and immune to halo implanting using ion bombardment oriented in the first and third tilted directions.

18. The halo implant method of claim 13, wherein:

during halo implanting of the first diffusion region, features of the implant mask corresponding to the second device structure prevent ion bombardment oriented in the first and third tilted directions from directly reaching the second diffusion region; and

during halo implanting of the second diffusion region, features of the implant mask corresponding to the first device structure prevent ion bombardment oriented in the second and fourth tilted directions from directly reaching the first diffusion region.

14. (canceled)

15. (canceled)