EMULATION OF A FIXED POINT OPERATION USING A CORRESPONDING FLOATING POINT OPERATION

• US 20090083358A1
• Filed: 11/28/2008
• Published: 03/26/2009
• Est. Priority Date: 09/17/2003
• Status: Abandoned Application

• Current Assignee: John R. Allen
• Original Assignee: John R. Allen
• Inventors: ALLEN, JOHN R.
• Application Number:
  US12/325,100
• Publication Number:
  US 20090083358A1
• Time in Patent Office: Days
• US Class Current: 708/495
• CPC Class Codes: G06F 9/45504 Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators

Abstract

A computer emulates a fixed-point operation that is normally performed on fixed-point operands, by use of a floating-point operation that is normally performed on floating-point operands. Several embodiments emulate a fixed-point operation by: expanding at least one fixed-point operand into a floating-point representation (also called “floating-point equivalent”), performing, on the floating-point equivalent, a floating-point operation that corresponds to the fixed-point operation, and reducing a floating-point result into a fixed-point result. The just-described fixed-point result may have the same representation as the fixed-point operand(s) and/or any user-specified fixed-point representation, depending on the embodiment. Also the operands and the result may be either real or complex, and may be either scalar or vector. The above-described emulation may be performed either with an interpreter or with a compiler, depending on the embodiment. A conventional interpreter for an object-oriented language (such as MATLAB version 6) may be extended to perform the emulation.

Claims

1. In a computer comprising a memory and a floating point unit, a method implemented in a set of instructions executable by said computer, the method comprising:

said computer receiving a program, a portion of said program comprising an operand (hereinafter “

fixed-point operand”

) represented in a fixed-point representation;

said computer expanding said fixed-point operand into a floating-point representation to obtain a floating-point equivalent;

said computer storing a precision of the fixed-point operand;

said computer further receiving in said portion an instruction comprising an operation to be performed on the fixed-point operand by a fixed point processor;

said computer using said floating point unit to perform on the floating-point equivalent, at least one floating-point operation that corresponds to the fixed-point operation, yielding at least one floating-point result;

said computer reducing said at least one floating-point result generated by the floating-point operation into a fixed-point result;

said computer using the stored precision during reduction of the floating-point result into the fixed-point result; and

said computer displaying said fixed-point result to a user.

2. The method of claim 1 wherein:

said fixed-point operand is one of at least two fixed-point operands to be used by said instruction; and

said expanding comprises normalization of at least said fixed-point operand if said fixed-point operand has a property of a value different from another value of said property of another operand to be used by said instruction.

3. The method of claim 1 wherein:

said instruction is to use two operands, with said fixed-point operand as a first operand, and another fixed-point operand as a second operand; and

said first operand has a property of a first value and the second operand has said property of a second value different from said first value, said expanding comprises normalization of at least one fixed-point operand to have a common value for said property, said common value being one of the first value and the second value.

4. The method of claim 1 further comprising:

said computer determining a property value for the fixed-point result, based on said at least one property value of the fixed-point operand, said fixed-point result being displayed to said user based on said property value from said determining.

5. The method of claim 1 comprising:

said computer determining a property value for the corresponding fixed-point result, based on the instruction that was performed on the fixed-point operand.

6. The method of claim 1 wherein:

a warning is displayed by said set of instructions.

7. The method of claim 1 wherein during reduction of the floating-point result to the fixed-point result, the method comprises:

said computer using a predetermined storage element to identify a mode of rounding to be performed on the floating-point result, wherein the mode of rounding is one of;

round (round-to-nearest), fix (round towards zero), ceil (round towards positive infinity), and floor (round towards negative infinity), and said computer performing said rounding, and said fixed-point result being displayed after said rounding is performed.

8. The method of claim 1 wherein during reduction of the floating-point result into the corresponding fixed-point result, the method comprises:

said computer using a predetermined storage element to identify a kind of arithmetic to be performed on the floating-point result, wherein the kind of arithmetic is one of;

saturation and modulo.

9. The method of claim 1 wherein:

said fixed-point representation is hereinafter “

first fixed-point representation”

;

the fixed-point result is expressed in a second fixed-point representation which is different from the first fixed-point representation; and

the method further comprises said computer using a predetermined storage element in said memory to identify a property of the second fixed-point representation, said fixed-point result being displayed to said user in said second fixed-point representation.

10. The method of claim 9 wherein:

said fixed-point operand comprises a plurality of additional floating-point values; and

said fixed-point operand is a vector operand.

11. The method of claim 9 wherein said property of the second fixed-point representation comprises at least two of:

a number of bits to the left of a point in the fixed-point number;

a number of bits to the right of said point in the fixed-point number; and

a total number of bits in the fixed-point number.

12. The method of claim 9 wherein at least one location in said memory of said computer encoded with said floating-point value of said fixed-point number holds a real component of said fixed-point number, said memory further comprising:

at least one additional location for holding a complex component of said fixed-point number.

13. The method of claim 1 wherein during expansion of the fixed-point operands into floating-point equivalents, the method comprises:

said computer detecting that the operands are invalidly scaled and issuing a warning message displayed to said user based on a predetermined storage element.

14. The method of claim 1 further comprising:

said computer using at least the precision of the fixed-point operand, during emulation of another instruction that uses a result of the fixed-point arithmetic operation.

15. The method of claim 1 wherein the instruction is to be performed on said fixed-point operand and at least an additional floating-point operand, and the fixed-point arithmetic operation is to be performed on the fixed-point operand and said additional floating-point operand, and the method further comprises:

during the act of receiving said floating-point operand, said computer reducing said additional floating-point operand into fixed-point representation, based on the precision of the fixed-point operand.

16. The method of claim 1 wherein said fixed-point operand comprises:

a value of a scaling factor of said fixed-point number.

17. A storage device comprising a set of instructions executable by a computer that comprises a floating point unit, the storage device comprising:

software to receive a program, at least a portion of said program being written for execution on a fixed point processor, said fixed point processor being not available in said computer for execution of said program, said portion of said program comprising at least one operand represented in fixed-point representation (hereinafter “

fixed-point operand;

software to expand said fixed-point operand into a floating-point representation to obtain a floating-point equivalent;

software to receive an instruction comprising an operation to be performed on the fixed-point operand;

software to receive another instruction that indicates a type of said fixed-point operand;

wherein said another instruction comprises a call to a function;

software to use said floating point unit to perform on the floating-point equivalent, at least one floating-point operation that corresponds to the fixed-point operation, yielding at least one floating-point result;

software to reduce, based on a value of said at least one property, said at least one floating-point result generated by the floating-point operation into a fixed-point result; and

software to store the fixed point result in said computer, as output of emulation without use of the fixed point processor.

18. The storage device of claim 17 wherein:

said function comprises instantiation of an object of a predetermined class, the object comprising said floating-point equivalent and at least one property of said fixed-point operand.

19. The storage device of claim 17 wherein:

the fixed-point operand is a real number;

the storage device further comprises software to receive another indication via another function name that a complex number is to be expressed in fixed-point representation; and

on receipt of an imaginary part and a real part of the complex number, software to expand each part into a corresponding floating-point equivalent.

20. A method implemented in a set of instructions executable by a computer that comprises a floating point unit, the method comprising:

said computer receiving a program, at least a portion of said program being written for execution on a fixed point processor, said fixed point processor being not available for execution of said program, said portion of said program comprising at least one operand represented in fixed-point representation (hereinafter “

fixed-point operand”

), said fixed-point representation having a precision identifying a first plurality of bits on a left side of a point and a second plurality of bits on a right side of said point;

said computer expanding said fixed-point operand into a floating-point representation to obtain a floating-point equivalent;

said computer receiving in said program an instruction comprising an operation to be performed on the fixed-point operand;

wherein said instruction comprises overloading of an operator normally used to denote said corresponding floating-point operation;

said computer using said floating point unit to perform on the floating-point equivalent, at least one floating-point operation that corresponds to the fixed-point operation, yielding at least one floating-point result;

said computer reducing, based said precision, said at least one floating-point result generated by the floating-point operation into a fixed-point result; and

said computer storing in memory the fixed point result as an output of emulation without use of the fixed point processor.