Inspection System, Inspection Method, and Method for Manufacturing Semiconductor Device

• US 20090087930A1
• Filed: 12/02/2008
• Published: 04/02/2009
• Est. Priority Date: 01/30/2004
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Arai, Yasuyuki, Akiba, Mai, Tachimura, Yuko
• Granted Patent: US 7,667,454 B2
• Time in Patent Office: Days
• US Class Current: 438/17
• CPC Class Codes: G01R 31/2886 Features relating to contacting the IC under test, e.g. probe heads; chucks G01R31/2865 takes precedence, test connections, e.g. test sockets, or probes per se, G01R1/04 or G01R1/06
• CPC Class Codes: G01R 31/2889 Interfaces, e.g. between probe and tester G01R31/31905 and G01R1/07364 take precedence
• CPC Class Codes: G01R 31/3025 Wireless interface with the DUT
• CPC Class Codes: G01R 31/303 of integrated circuits G01R31/305 - G01R31/315 take precedence
• CPC Class Codes: G06K 7/0095 Testing the sensing arrangement, e.g. testing if a magnetic card reader, bar code reader, RFID interrogator or smart card reader functions properly testing of electrical circuits G01R31/28

Abstract

The present invention provides an inspection system of ID chips that can supply a signal or power supply voltage to an ID chip without contact, and can increase throughput of an inspection process and an inspection method using the inspection system. The inspection system according to the present invention includes a plurality of inspection electrodes, a plurality of inspection antennas, a position control unit, a unit for applying voltage to each of the inspection antennas, and a unit for measuring potentials of the inspection electrodes. One feature of the inspection system is that a plurality of ID chips and the plurality of inspection electrodes are overlapped with a certain space therebetween, and the plurality of ID chips and the plurality of inspection antennas are overlapped with a certain space therebetween, and the plurality of ID chips are interposed between the plurality of inspection electrodes and the plurality of inspection antennas by the position control unit.

Claims

1-40. -40. (canceled)

41. A method for manufacturing a semiconductor device comprising:

forming a first thin film transistor and a second thin film transistor over a substrate;

forming a first antenna on the first thin film transistor and a second antenna on the second thin film transistor;

supplying a signal or power supply voltage to the first and second antennae without contact with the first and second antennae;

moving an inspection electrode with an arbitrary portion or a whole portion of the first antenna overlapped with the inspection electrode with a space therebetween and with an arbitrary portion or a whole antenna of the second antenna overlapped with the inspection electrode with a space therebetween;

conducting an inspection for grasping a first operating state of the first thin film transistor and the first antenna from a first voltage of the inspection electrode and a first position of the inspection electrode to the first antenna, and a second operating state of the second thin film transistor and the second antenna from a second voltage of the inspection electrode and a second position of the inspection electrode to the second antenna;

separating the substrate from the first and second transistors and the first and second antennae; and

attaching the first and second transistors and the first and second antennae to a support medium.

43. The method for manufacturing a semiconductor device according to claim 41, wherein the substrate is an insulator.

45. The method for manufacturing a semiconductor device according to claim 41, wherein the substrate is a glass substrate or a plastic substrate.

47. The method for manufacturing a semiconductor device according to claim 41, wherein the spaces are controlled by flowing a fluid thereinto.

49. The method for manufacturing a semiconductor device according to claim 41, wherein an inspection method by voltages applied to the first and second antennae are calculated by a method of successive approximation, a Fourier transform method using a projection slice theorem, or a convolution theorem method to grasp the first and second operating states is employed.

51. The method for manufacturing a semiconductor device according to claim 41, wherein the inspection electrode is rotated.

53. The method for manufacturing a semiconductor device according to claim 41, wherein an insulating film is formed over the first thin film transistor and the first antenna is formed over the insulating film, and

wherein the first thin film transistor is electrically connected to the first antenna.

42. A method for manufacturing a semiconductor device comprising:

forming a first thin film transistor and a second thin film transistor over a substrate;

forming a first antenna on the first thin film transistor and a second antenna on a second thin film transistor;

supplying a signal or power supply voltage to the first and second antennae without contact with the first and second antennae;

moving a first inspection electrode with an arbitrary portion or a whole portion of the first antenna overlapped with the inspection electrode with a space therebetween and an arbitrary portion or a whole portion of the second antenna overlapped with the inspection electrode with a space therebetween, and a second inspection electrode with an arbitrary portion or a whole portion of the first antenna overlapped with the second inspection electrode with a space therebetween and an arbitrary portion or a whole portion of the second antenna overlapped with the second inspection electrode with a space therebetween;

conducting an inspection for grasping a first operating state of the first thin film transistor and the first antenna from a first voltage of the first inspection electrode and a first position of the first inspection electrode to the first antenna, a second operating state of the second thin film transistor and the second antenna from a second voltage of the first inspection electrode and a second position of the first inspection electrode to the second antenna, a third operating state of the first thin film transistor and the first antenna from a third voltage of a second inspection electrode and a third position of the second inspection electrode to the first antenna, a fourth operating state of the second thin film transistor and the second antenna from a fourth voltage of the second inspection electrode and a fourth position of the second inspection electrode to the second antenna,

separating the substrate from the first and second transistors and the first and second antennae; and

attaching the first and second transistors and the first and second antennae to a support medium.

44. The method for manufacturing a semiconductor device according to claim 42, wherein the substrate is an insulator.

46. The method for manufacturing a semiconductor device according to claim 42, wherein the substrate is a glass substrate or a plastic substrate.

48. The method for manufacturing a semiconductor device according to claim 42, wherein the spaces are controlled by flowing a fluid thereinto.

50. The method for manufacturing a semiconductor device according to claim 42, wherein an inspection method by which voltages applied to first and second antennae are calculated by a method of successive approximation, a Fourier transform method using a projection slice theorem, or a convolution theorem method to grasp the first, second, third and fourth operating states is employed.

52. The method for manufacturing a semiconductor device according to claim 42, wherein the first and second inspection electrode are rotated.

54. The method for manufacturing a semiconductor device according to claim 42, wherein an insulating film is formed over the first thin film transistor, the first antenna is formed over the insulating film, and

wherein the first thin film transistor is electrically connected to the first antenna.