DUAL DAMASCENE WITH AMORPHOUS CARBON FOR 3D DEEP VIA/TRENCH APPLICATION
First Claim
1. A method for fabricating a 3-D monolithic memory device, comprising:
- first patterning of a first insulating layer to form a trench therein using a first amorphous carbon hard mask;
applying amorphous carbon to fill in at least a portion of the trench and to provide an amorphous carbon layer above the first insulating layer;
second patterning of the first insulating layer, using a second amorphous carbon hard mask formed from the amorphous carbon layer, to form a via in the first insulating layer which is aligned with the trench and extends below the trench; and
providing a conductive material in the trench and via.
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Accused Products
Abstract
A method for fabricating a 3-D monolithic memory device in which a via and trench are etched using an amorphous carbon hard mask. The via extends in multiple levels of the device as a multi-level vertical interconnect. The trench extends laterally, such as to provide a word line or bit line for memory cells, or to provide other routing paths. A dual damascene process can be used in which the via is formed first and the trench is formed second, or the trench is formed first and the via is formed second. The technique is particularly suitable for deep via applications, such as for via depths of greater than 1 μm. A dielectric antireflective coating, optionally with a bottom antireflective coating, can be used to etch an amorphous carbon layer to provide the amorphous carbon hard mask.
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Citations
23 Claims
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1. A method for fabricating a 3-D monolithic memory device, comprising:
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first patterning of a first insulating layer to form a trench therein using a first amorphous carbon hard mask; applying amorphous carbon to fill in at least a portion of the trench and to provide an amorphous carbon layer above the first insulating layer; second patterning of the first insulating layer, using a second amorphous carbon hard mask formed from the amorphous carbon layer, to form a via in the first insulating layer which is aligned with the trench and extends below the trench; and providing a conductive material in the trench and via. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for fabricating a 3-D monolithic memory device, comprising:
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first patterning of a first insulating layer to form a via therein using a first amorphous carbon hard mask; applying amorphous carbon to fill in at least a portion of the via and to provide an amorphous carbon layer above the first insulating layer; second patterning of the first insulating layer, using at least the amorphous carbon layer as a second amorphous carbon hard mask, to form a trench in the first insulating layer aligned with the via, the via extends below the trench; and providing a conductive material in the trench and via. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A method for fabricating a 3-D monolithic memory device, comprising:
forming a vertical conductive interconnect which extends in multiple levels in the memory device, the vertical conductive interconnect comprises a via and trench which are formed by a dual damascene process in which at least one of the via and trench is patterned using an associated amorphous carbon hard mask, and a conductive material is provided in the via and trench. - View Dependent Claims (20, 21, 22, 23)
Specification