WEAR LEVELING METHOD AND CONTROLLER USING THE SAME

• US 20090094409A1
• Filed: 01/22/2008
• Published: 04/09/2009
• Est. Priority Date: 10/04/2007
• Status: Active Grant

• Current Assignee: Emtops Electronics Corp. (Phison Electronics Corporation)
• Original Assignee: Phison Electronics Corporation
• Inventors: Yeh, Chih-Kang, Chu, Chien-Hua
• Granted Patent: US 8,108,589 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/7211 Wear leveling

Abstract

A wear leveling method for non-volatile memory is provided, by which the non-volatile memory is substantially divided into a plurality of blocks and the blocks are grouped into a data area and a spare area. The method includes selecting a block based on an erased sequence when getting the block from the spare area. The method also includes performing a wear leveling procedure.

Claims

1. A wear leveling method for a non-volatile memory, wherein the non-volatile memory is substantially divided into a plurality of physical blocks, and the physical blocks are at least grouped into a data area and a spare area, the wear leveling method comprising:

(a) selecting a physical block based on an erased sequence of the physical blocks when the physical block is selected from the spare area;

(b) performing a wear leveling procedure.

2. The wear leveling method for a non-volatile memory as claimed in claim 1, wherein the step (a) comprises:

selecting the physical block according to a weight mark.

3. The wear leveling method for a non-volatile memory as claimed in claim 2, wherein the step (a) further comprises:

(c) selecting the physical block with the weight mark and being primarily erased within the spare area when the physical block used for the data area is selected from the spare area; and

(d) selecting the physical block without the weight mark and being lastly erased within the spare area based on the erased sequence when the physical block is selected from the spare area and is used for a temporary area further grouped according to the physical blocks.

4. The wear leveling method for a non-volatile memory as claimed in claim 2, wherein the wear leveling procedure comprises:

exchanging the physical block mapping to an unused logical block with the physical block with the weight mark within the spare area.

5. The wear leveling method for a non-volatile memory as claimed in claim 1 further comprising:

implementing the step (b) when performing the erasing of the physical blocks a first predetermined erasing times.

6. The wear leveling method for a non-volatile memory as claimed in claim 1 further comprising:

implementing the step (b) in a random mode.

7. The wear leveling method for a non-volatile memory as claimed in claim 1 further comprising:

recording an erased physical block in an erased block table based on the erased sequence, wherein the erased physical block is not recorded if the erased physical block has been recorded in the erased block table for a second predetermined times.

8. The wear leveling method for a non-volatile memory as claimed in claim 7 further comprising:

recording the erased physical block according to a circular coverage mode, wherein if the erased physical block repeatedly recorded in the erased block table is about to be overwritten, a primary record of other erasing records of the erased physical block within the erased block table is then marked with the weight mark.

9. The wear leveling method for a non-volatile memory as claimed in claim 3, wherein the step (c) further comprises:

judging whether the physical block with the weight mark exists in the spare area, and selecting a primarily erased physical block within the spare area based on the erased sequence if there is no physical block with the weight mark.

10. The wear leveling method for a non-volatile memory as claimed in claim 3 further comprising:

selecting the physical block from the spare area in a random mode or a sequential mode when the physical block is selected from the spare area and is used for a substitute area further grouped according to the physical blocks.

11. The wear leveling method for a non-volatile memory as claimed in claim 4 further comprising:

recording utilization information of a logical block by using a logical physical mapping table.

12. The wear leveling method for a non-volatile memory as claimed in claim 7 further comprising:

if there is no record within the erased block table, selecting the physical block from the spare area in the random mode or the sequential mode when the physical block is selected from the spare area.

13. The wear leveling method for a non-volatile memory as claimed in claim 1 further comprising:

performing the step (b) by implementing a normal programming instruction of a host.

14. A controller, for a storage device, wherein a non-volatile memory of the storage device of the storage device is substantially divided into a plurality of physical blocks, and the physical blocks are at least grouped into a data area and a spare area, the controller comprising:

a microprocessor unit is configured for controlling a whole operation of the controller;

a buffer memory is electrically connected to the microprocessor unit and configured for temporarily storing data;

a non-volatile memory interface is electrically connected to the microprocessor unit and configured for accessing the non-volatile memory; and

a memory management module is electrically connected to the microprocessor unit and configured for managing the non-volatile memory, wherein the memory management module selects a physical block based on an erased sequence of the physical blocks when the physical block is selected from the spare area, and exchanges a physical block in the spare area with a physical block in the data area.

15. The controller as claimed in claim 14, wherein the memory management module selects a physical block further based on a weight mark.

16. The controller as claimed in claim 14, wherein the memory management module selects the physical block with the weight mark and being primarily erased within the spare area when the physical block used for the data area is selected from the spare area;

and selects the physical block without the weight mark and being lastly erased within the spare area based on the erased sequence when the physical block is selected from the spare area and is used for a temporary area further grouped according to the physical blocks.

17. The controller as claimed in claim 15, wherein the memory management module exchanges the physical block mapping to an unused logical block with the physical block with the weight mark within the spare area.

18. The controller as claimed in claim 14, wherein the memory management module exchanges the physical block in the spare area with the physical block in the data area when the memory management module performs the erasing of the physical blocks a first predetermined erasing times.

19. The controller as claimed in claim 14, wherein the memory management module exchanges the physical block in the spare area with the physical block in the data area in random.

20. The controller as claimed in claim 14, wherein the memory management module further records an erased physical block in an erased block table based on the erased sequence, wherein the erased physical block is not recorded if the erased physical block has been recorded in the erased block table for a second predetermined times block has been recorded in the erased block table for a second predetermined times.

21. The controller as claimed in claim 20, wherein the memory management module further records the erased physical block according to a circular coverage mode, wherein if the erased physical block repeatedly recorded in the erased block table is about to be overwritten, a primary record of other erasing records of the erased physical block within the erased block table is then marked with the weight mark.

22. The controller as claimed in claim 16, wherein the memory management module further judges whether the physical block with the weight mark exists in the spare area, and selects a primarily erased physical block within the spare area based on the erased sequence if there is no physical block with the weight mark.

23. The controller as claimed in claim 16, wherein the memory management module further selects the physical block from the spare area in a random mode or a sequential mode when the physical block is selected from the spare area and is used for a substitute area further grouped according to the physical blocks.

24. The controller as claimed in claim 17, wherein the memory management module further records utilization information of a logical block by using a logical physical mapping table.

25. The controller as claimed in claim 20, wherein if there is no record within the erased block table, the memory management module selects the physical block from the spare area in the random mode or the sequential mode when the physical block is selected from the spare area.

26. The controller as claimed in claim 14, wherein the memory management module further exchanges the physical block in the spare area with the physical block in the data area by implementing a normal programming instruction of a host.

27. The controller as claimed in claim 14, wherein the non-volatile memory comprises a SLC NAND flash memory and a MLC NAND flash memory.

28. A wear leveling method for a non-volatile memory, wherein the non-volatile memory is substantially divided into a plurality of physical blocks, and the physical blocks are at least grouped into a data area and a spare area, the wear leveling method comprising:

(a) recording utilization information of a plurality of logical blocks with a table;

(b) selecting a physical block within the data area mapping to an unused logical block according to the utilization information; and

(c) exchanging the selected physical block with a physical block within the spare area.

29. The wear leveling method for a non-volatile memory as claimed in claim 28, wherein the table is a logical physical mapping table.

30. The wear leveling method for a non-volatile memory as claimed in claim 28, wherein in the step (b), the physical block is selected in a sequential mod or a random mode.

31. The wear leveling method for a non-volatile memory as claimed in claim 28 further comprising:

performing the step (c) by implementing a normal programming instruction of a host.

32. A controller, for a storage device, wherein a non-volatile memory of the storage device of the storage device is substantially divided into a plurality of blocks, and the blocks are at least grouped into a data area and a spare area, the controller comprising:

a microprocessor unit is configured for controlling a whole operation of the controller;

a buffer memory is electrically connected to the microprocessor unit and configured for temporarily storing data;

a non-volatile memory interface is electrically connected to the microprocessor unit and configured for accessing the non-volatile memory; and

a memory management module is electrically connected to the microprocessor unit and configured for managing the non-volatile memory, wherein the memory management module records utilization information of a plurality of logical blocks with a table, selects a physical block within the data area mapping to an unused logical block according to the utilization information and exchanges the selected physical block with a physical block within the spare area.

33. The controller as claimed in claim 32, wherein the table is a logical physical mapping table.

34. The controller as claimed in claim 32, wherein the memory management module selects the physical block within the data area mapping to the unused logical block according to the utilization information with a sequential mod or a random mode.

35. The controller as claimed in claim 32, wherein the memory management module exchanges the selected physical block with a physical block within the spare area by implementing a normal programming instruction of a host.

36. The controller as claimed in claim 32, wherein the non-volatile memory comprises a SLC NAND flash memory and a MLC NAND flash memory.