Image sensor

• US 20090096901A1
• Filed: 04/10/2008
• Published: 04/16/2009
• Est. Priority Date: 04/10/2007
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Oh, Tae-Seok, Bae, Jeong-Hoon
• Application Number:
  US12/081,041
• Publication Number:
  US 20090096901A1
• Time in Patent Office: Days
• US Class Current: 348/294
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Abstract

An image sensor may include a first common column line and/or at least one first pixel. The at least one first pixel may be connected to the first common column line. The at least one first pixel may include a first photoelectron conversion region, a first transfer gate, a first overflow gate, and/or a first overflow drain region. The first transfer gate may be between the first photoelectron conversion region and the first common column line. The first overflow gate may be spaced from the first transfer gate. The first photoelectron conversion region may be between the first overflow gate and the first transfer gate. The first overflow drain region may be on an opposite side of the first photoelectron conversion region with respect to the first transfer gate. The first overflow gate may be between the first overflow drain region and the first photoelectron conversion region.

Claims

1. An image sensor comprising:

a first common column line; and

at least one first pixel connected to the first common column line, wherein the at least one first pixel includes;

a first photoelectron conversion region;

a first transfer gate between the first photoelectron conversion region and the first common column line;

a first overflow gate spaced from the first transfer gate, wherein the first photoelectron conversion region is between the first overflow gate and the first transfer gate; and

a first overflow drain region on an opposite side of the first photoelectron conversion region with respect to the first transfer gate, wherein the first overflow gate is between the first overflow drain region and the first photoelectron conversion region.

2. The image sensor as claimed in claim 1, wherein the at least one first pixel is a plurality of the at least one first pixel connected to the first common column line in parallel.

3. The image sensor as claimed in claim 2, wherein the first overflow drain region of each of the pixels is connected to a power source voltage.

4. The image sensor as claimed in claim 2, wherein adjacent two pixels share a first overflow drain region.

5. The image sensor as claimed in claim 2, wherein adjacent two pixels share a first overflow gate.

6. The image sensor as claimed in claim 2, further comprising:

a source follower transistor including a gate configured to receive an electric potential of the first common column line; and

a reset transistor connected to the first common column line and configured to reset the electric potential of the first common column line.

7. The image sensor as claimed in claim 6, wherein

the gate of the source follower transistor and a source of the reset transistor are coupled to each other, and

a drain of the source follower transistor and a drain of the reset transistor are connected to a power source voltage.

8. The image sensor of claim 1, further comprising:

at least one second pixel connected to the first common column line, the at least one first pixel and the at least one second pixel connected to the first common column line in parallel, wherein the at least one second pixel includes;

a second photoelectron conversion region;

a second transfer gate between the second photoelectron conversion region and the first common column line;

a second overflow gate spaced from the second transfer gate, wherein the second photoelectron conversion region is between the second overflow gate and the second transfer gate; and

a second overflow drain region on an opposite side of the second photoelectron conversion region with respect to the second transfer gate, wherein

the second overflow gate is between the second overflow drain region and the second photoelectron conversion region.

9. The image sensor as claimed in claim 8, wherein

the at least one first pixel is a plurality of the at least one first pixel connected to the first common column line in parallel, and

the at least one second pixel is a plurality of the at least one second pixel connected to the first common column line in parallel.

10. The image sensor as claimed in claim 8, wherein the first overflow drain region and the second overflow drain region are electrically connected to each other.

11. The image sensor as claimed in claim 8, wherein the first overflow gate and the second overflow gate are electrically connected to each other.

12. The image sensor as claimed in claim 8, wherein the first and the second overflow drain regions are a same overflow drain region.

13. The image sensor as claimed in claim 8, wherein the first and the second overflow gates are a same overflow gate.

14. The image sensor as claimed in claim 8, wherein the first and the second overflow drain regions are connected to a power source voltage.

15. The image sensor as claimed in claim 8, further comprising:

a source follower transistor including a gate configured to receive an electrical potential of the first common column line; and

a reset transistor connected to the first common column line and configured to reset the electrical potential of the first common column line.

16. The image sensor as claimed in claim 15, wherein

the gate of the source follower transistor and a source of the reset transistor are coupled to each other, and

a drain of the source follower transistor and a drain of the reset transistor are connected to a power source voltage.

17. The image sensor as claimed in claim 1, further comprising:

a second common column line, wherein

the at least one first pixel and at least one second pixel are between the first common column line and the second common column line, the at least one first pixel is a plurality of the at least one first pixel connected to the first common column line in parallel and the at least one second pixel is a plurality of the at least one second pixel connected to the second common column line in parallel,

wherein each the second pixels include;

a second photoelectron conversion region;

a second transfer gate between the second photoelectron conversion region and the second common column line;

a second overflow gate spaced from the second transfer gate, wherein the second photoelectron conversion region is between the second overflow gate and the second transfer gate; and

a second overflow drain region on an opposite side of the second photoelectron conversion region with respect to the second transfer gate, wherein the second overflow gate is between the second overflow drain region and the second photoelectron conversion region.

18. The image sensor as claimed in claim 17, wherein the overflow drain region is connected to a power source voltage.

19. The image sensor as claimed in claim 17, wherein the first overflow drain region of at least one of the first pixels is a same overflow drain region as the second overflow drain region of at least one of the second pixels.

20. The image sensor as claimed in claim 17, wherein the first overflow gate of at least one of the first pixels is a same overflow gate as the second overflow gate of at least one of the second pixels.