METHOD AND SYSTEM OF DETECTING AND LOCKING TO MULTI-STANDARD VIDEO STREAMS
First Claim
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1. A video processing circuit comprising:
- a incoming video circuit for receiving an incoming video signal;
a phase lock loop circuit for receiving a signal representing the frequency of said incoming video signal and providing an output signal related to the frequency of said incoming video signal; and
a determining and setting circuit for determining a clock frequency of said incoming video signal and responsive thereto for determining and setting operating parameters for said phase lock loop circuit.
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Abstract
A video processing system includes a video detection circuit for determining the clock frequency of an incoming video signal. Using the determined clock frequency, adjustments are made in a phase lock loop to enable a quick lock onto the clock frequency of the incoming video signal.
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Citations
24 Claims
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1. A video processing circuit comprising:
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a incoming video circuit for receiving an incoming video signal; a phase lock loop circuit for receiving a signal representing the frequency of said incoming video signal and providing an output signal related to the frequency of said incoming video signal; and a determining and setting circuit for determining a clock frequency of said incoming video signal and responsive thereto for determining and setting operating parameters for said phase lock loop circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of processing a video signal, said method comprising:
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counting a frequency representing a frequency of an incoming video signal; determining a clock frequency of said incoming video signal; adjusting parameters of a first signal provided to a phase lock loop circuit, which locks to a signal representing said incoming video signal based on the determined clock frequency; and providing a second signal by said phase lock loop circuit a process clock frequency for use in processing said incoming video signal, said process clock frequency related to said frequency of said incoming video signal. - View Dependent Claims (12, 13, 14, 15)
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16. A video processing circuit for processing an incoming video stream, comprising:
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an incoming video signal circuit for receiving an incoming video signal; a frequency counter circuit for determining a clock frequency of said incoming video signal and determining a video format based on the determined clock frequency, said frequency counter comprises; a period counter circuit for counting a period representing time between a sync signals of said incoming video signal, a timeout circuit for monitoring elapsed time between successive sync signals and providing a hold signal when a sync signal is detected as missing; and latch circuit for holding a signal from said period counter, said latch circuit coupled to and being configured to receive said sync signals, signals from said period counter circuit and signals from said timeout circuit, said latch circuit being reset with a new signal from said period counter whenever a sync signal is received except when a hold signal is received from said timeout circuit. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24)
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Specification