Method and Apparatus to Facilitate Testing of Printed Semiconductor Devices

• US 20090098668A1
• Filed: 11/13/2008
• Published: 04/16/2009
• Est. Priority Date: 10/26/2005
• Status: Abandoned Application

• Current Assignee: Motorola Solutions, Inc.
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Zhang, Jie, Jonnalagadda, Krishna D., Kalyanasundaram, Krishna, Gamota, Daniel R., Brazis, Paul W.
• Application Number:
  US12/270,544
• Publication Number:
  US 20090098668A1
• Time in Patent Office: Days
• US Class Current: 438/16
• CPC Class Codes: H01L 22/14 for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
• CPC Class Codes: H10K 71/135 using ink-jet printing

Abstract

A printing platform receives (102) (preferably in-line with a semiconductor device printing process (101)) a substrate having at least one semiconductor device printed thereon and further having a test structure printed thereon, which test structure comprises at least one printed semiconductor layer. These teachings then provide for the automatic testing (103) of the test structure with respect to at least one static (i.e., relatively unchanging) electrical characteristic metric. The static electrical characteristic metric (or metrics) of choice will likely vary with the application setting but can include, for example, a measure of electrical resistance, a measure of electrical reactance, and/or a measure of electrical continuity. Optionally (though preferably) the semiconductor device printing process itself is then adjusted (105) as a function, at least in part, of this metric.

Claims

1-12. -12. (canceled)

13. A semiconductor device printing platform comprising:

at least one printing station having a substrate receiver, a semiconductor device materials printer, and a printed substrate output, wherein the semiconductor device materials printer is configured and arranged to print both a functional semiconductor device and a test structure, which test structure comprises at least one printed semiconductor layer;

at least one testing station having an input to receive printed substrates from the printing station and being configured and arranged to automatically test the test structure with respect to at least one static electrical characteristic metric.

14. The semiconductor device printing platform of claim 13 wherein the semiconductor device materials printer comprises at least one of a contact printer and a non-contact printer.

15. The semiconductor device printing platform of claim 13 wherein the printed substrates comprises at least one of:

a substantially paper-like substrate;

a plastic substrate.

16. The semiconductor device printing platform of claim 13 wherein the at least one static electric characteristic metric comprises at least one of:

a measure of electrical resistance;

a measure of electrical reactance;

a measure of electrical continuity.

17. The semiconductor device printing platform of claim 13 further comprising a controller that is operably coupled to the at least one printing station and the at least one testing station and being configured and arranged to automatically adjust the at least one printing station as a function, at least in part, of the at least one static electrical characteristic metric.

18. The semiconductor device printing platform of claim 13 wherein the test structure comprises a pogo pin assembly.

19. The semiconductor device printing platform of claim 18 wherein the pogo pin assembly further comprises a rotating cylinder having pogo pins disposed thereon.

20. The semiconductor device printing platform of claim 13 wherein the test structure comprises at least one non-contact sensor.