Adaptive hybrid density memory storage device and control method thereof

• US 20090100244A1
• Filed: 07/01/2008
• Published: 04/16/2009
• Est. Priority Date: 10/15/2007
• Status: Active Grant

• Current Assignee: ADATA Technology Co., Ltd.
• Original Assignee: ADATA Technology Co., Ltd.
• Inventors: Chen, Ming-Dar, Chang, Li-Pin
• Granted Patent: US 8,171,207 B2
• Time in Patent Office: Days
• US Class Current: 711/172
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G11C 11/5621 using charge storage in a floating gate
• CPC Class Codes: G11C 2211/5641 Multilevel memory having cells with different number of storage levels

Abstract

The present invention discloses a control method of an adaptive hybrid density memory storage device suitable for locating a data to the storage device. The storage device includes a high density memory unit and a low density memory unit. The method is characterized in that the property of the data is determined by its length, and the data is written to the high density memory unit or the low density memory unit according to the property of the data and the relative wearing rate and the amount of data processed by the storage device.

Claims

1. A control method of an adaptive hybrid density memory storage device suitable for writing a writing data to a hybrid density storage device, wherein the hybrid density storage device comprises a high density memory unit and a low density memory unit, the method comprising steps of:

executing a hot data filter procedure, wherein the length of the writing data is compared with a threshold for recognizing the property of the writing data; and

locating the writing data into the high density memory unit or the low density memory unit of the hybrid density storage device according to the property of the writing data.

2. The control method as claimed in claim 1, wherein if the length of the writing data is shorter then the threshold, the writing data is classified as a hot data and will be located into the low density memory unit, otherwise, the writing data is classified as a cold data and will be located into the high density memory unit.

3. The control method as claimed in claim 2, wherein the step of locating the writing data into the hybrid density memory storage device further comprising the step of executing an adapting procedure and a data processing procedure.

4. The control method as claimed in claim 3, wherein the low density memory unit defines plural continuous blocks and defines a valid block range therefrom through a head pointer register and an tail pointer register for storing at least a valid data, and wherein the address stored in the head pointer register is directed to a block for storing the newest valid data, and the address stored in the tail pointer register is directed to a block for storing the oldest valid data.

5. The control method as claimed in claim 4, wherein the adapting procedure is used to balance the wearing rate of the hybrid density memory storage device, so that if the low density memory unit has a higher wearing rate than the high density memory unit, the writing data is located to the high density memory unit, otherwise, the writing data is located to the low density memory unit.

6. The control method as claimed in claim 5, wherein the adapting procedure further comprises steps of:

reducing the valid block range if the wearing rate of the low density memory unit is higher than the high density memory unit lasting for a period of time; and

erasing the valid data in the reduced valid blocks.

7. The control method as claimed in claim 6, wherein if the valid data to be erased does not recorded in other valid blocks, the valid data is moved to the high density memory unit.

8. The control method as claimed in claim 6, wherein in the adapting procedure, prior to locating the writing data to the low density memory unit, further comprises the step of:

judging if the valid block range is reduced, if yes, increasing the range of the valid blocks.

9. The control method as claimed in claim 4, wherein the data processing procedure comprises the steps of:

redirecting the head pointer register to the block next to the originally directed one;

locating the writing data to the directed block by the head pointer register;

erasing the valid data stored in the block directed by the tail pointer register; and

redirecting the tail pointer register to the block next to the originally directed one,

wherein the valid block range bounded by the head pointer register and the tail pointer register is fixed.

10. The control method as claimed in claim 9, wherein the low density memory unit records the valid data through cyclically utilizing the storing space thereof.

11. A control method of an adaptive hybrid density memory storage device suitable for locating a writing data in a hybrid density storage device, wherein the hybrid density storage device comprises a high density memory unit and a low density memory unit, the method comprising steps of:

executing an adapting procedure, wherein a wearing rate of the lower density memory unit is compared with the high density memory unit for deciding the location for recording the writing data; and

executing a data processing procedure, wherein the writing data is sequentially located into each block of the valid block range.

12. The control method as claimed in claim 11, wherein the low density memory unit defines plural continuous blocks and defines a valid block range therefrom through a head pointer register and an tail pointer register for storing at least an valid data, and wherein the address stored in the head pointer register is directed to the block for storing the newest valid data, and the address stored in the tail pointer register is directed to the block for storing the oldest valid data.

13. The control method as claimed in claim 11, wherein in the adapting procedure, if the low density memory unit has a higher wearing rate than the high density memory unit, the writing data is located to the high density memory unit, otherwise, the writing data is located to the low density memory unit.

14. The control method as claimed in claim 11, wherein the adapting procedure further comprises the steps of:

reducing the valid block range if the wearing rate of the low density memory unit is higher than the high density memory unit lasting for a period of time; and

erasing the valid data in the reduced valid blocks.

15. The control method as claimed in claim 14 which prior to locating the writing data to the low density memory unit, further comprises the step of:

judging if the valid block range is reduced, and if yes, increasing the range of the valid blocks.

16. The control method as claimed in claim 12, wherein the data processing procedure comprises the steps of:

redirecting the head pointer register to the block next to the originally directed one;

locating the writing data to the directed block by the head pointer register;

erasing the valid data stored in the block directed by the tail pointer register; and

redirecting the tail pointer register to the block next to the originally directed one,

wherein the valid block range bounded by the head pointer register and the tail pointer register is fixed.

17. The control method as claimed in claim 16, wherein the data processing procedure further comprises the step of:

recording the valid data to the high density memory unit if the valid data to be erased does not recorded in other valid blocks.

18. The control method as claimed in claim 16, wherein the low density memory unit records the valid data through cyclically utilizing the storing space thereof.

19. An adaptive hybrid density memory storage device suitable for accessing a writing data in a host, wherein the hybrid density storage device comprises a low density memory unit, a high density memory unit and a control unit, the control unit comprising:

a hot data filter unit, for comparing a data length of the writing data with a threshold so as to recognize the property of the writing data; and

an adapting unit, coupled between the hot data filter unit and the hybrid density memory module, for receiving the writing data and locating the writing data into the high density memory unit or the low density memory unit of the hybrid density storage device according to a comparison result of a wearing rate and the amount of data processed by the low density memory unit with those of the high density memory unit.

20. The adaptive hybrid density memory storage device as claimed in claim 19, wherein the threshold is decided from the continuous plural writing data, taking the length of the writing data to decide the threshold according to the average usual repeat address of the writing data.

21. The adaptive hybrid density memory storage device as claimed in claim 19, judging the writing data as a hot data if the length of the writing data is smaller than the threshold, otherwise, the writing data is a cold data.

22. The adaptive hybrid density memory storage device as claimed in claim 19, wherein the control unit further comprises:

a system interface, coupled to the host, for transmitting commands and data between the host and the hybrid density memory storage device;

a microprocessor, coupled to the system interface and the hot data filter unit, for transmitting the writing data to the hot data filter unit;

a data transmission buffer, coupled to the system interface, for temporarily storing the writing data; and

a memory interface, coupled between the data transmission buffer and the non-volatile memory unit and controlled by the microprocessor to transmit the writing data.