PACKAGE COMPRISING AN ELECTRICAL CIRCUIT

• US 20090102003A1
• Filed: 04/24/2007
• Published: 04/23/2009
• Est. Priority Date: 04/25/2006
• Status: Active Grant

• Current Assignee: Fraunhofer Gesellschaft Zur Foerderung Der Angewandten Forsching E.V.
• Original Assignee: Fraunhofer Gesellschaft Zur Foerderung Der Angewandten Forsching E.V.
• Inventors: Bauer, Jochen, Vogt, Holger
• Granted Patent: US 8,581,357 B2
• Time in Patent Office: Days
• US Class Current: 257/433
• CPC Class Codes: B81B 2201/0278 Temperature sensors
• CPC Class Codes: B81C 1/00269 Bonding of solid lids or wafers to the substrate
• CPC Class Codes: B81C 2203/019 characterised by the material or arrangement of seals between parts
• CPC Class Codes: G01J 5/02 Constructional details
• CPC Class Codes: G01J 5/023 Particular leg structure or construction or shape; Nanotubes
• CPC Class Codes: G01J 5/04 Casings
• CPC Class Codes: G01J 5/045 Sealings; Vacuum enclosures; Encapsulated packages; Wafer bonding structures; Getter arrangements getter arrangements per se H01L23/26 and H01L21/3221
• CPC Class Codes: G01J 5/046 Materials; Selection of thermal materials
• CPC Class Codes: G01J 5/0875 Windows; Arrangements for fastening thereof
• CPC Class Codes: G01J 5/20 using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14649 Infrared imagers
• CPC Class Codes: H01L 27/14683 Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A package including an electrical circuit may be produced in a more efficient manner when on a substrate including a plurality of electrical circuits the circuits are tested for their functionality and when the functional circuits are connected, by means of a frame enclosing the circuit on the surface of the substrate, to a second substrate whose surface area is smaller than that of the first substrate. The substrates are connected, by means of a second frame, which is adapted to the first frame and is located on the surface of the second substrate, such that the first and second frames lie one on top of the other. Subsequently, the functional packaged circuits may be singulated in a technologically simple manner.

Claims

1-24. -24. (canceled)

25. :

A method of producing a package comprising an electrical circuit, the method comprising;

providing a first substrate comprising a plurality of electrical circuits;

testing the electrical circuits for their functionality;

producing a first frame, which encloses at least one electrical circuit, on a surface of the first substrate;

connecting a second substrate comprising a second frame, which is adapted to the first frame on a surface of the second substrate, to the first substrate so that the first frame and the second frame lie on top of each other, so as to package a functional electrical circuit, the surface of the second substrate being smaller than the surface of the first substrate; and

singulating the functional electrical circuit along a singulation contour which does not intersect the surface of the second substrate.

26. :

The method as claimed in claim 25, wherein the electrical circuits comprise bolometers.

27. :

The method as claimed in claim 25, wherein connecting comprises interconnecting the first and second substrates in a gas-tight manner.

28. :

The method as claimed in claim 25, wherein connecting is performed in a vacuum or in a protective-gas atmosphere.

29. :

The method as claimed in claim 25, wherein producing the first frame comprises producing a metallic frame; and

wherein connecting comprises connecting the first metallic frame to a second metallic frame.

30. :

The method as claimed in claim 25,

wherein producing the first frame comprises;

producing a first frame portion from a first metal; and

producing a second frame portion from a second metal on the first frame portion, the first and second metals being selected such that a first melting temperature of an alloy formed from the first and second metals is higher than a second melting temperature of the second metal; and

wherein connecting comprises connecting a second frame whose side facing the first substrate comprises the first metal.

31. :

The method as claimed in claim 25, wherein a first frame comprising a side facing the second substrate is produced from the first metal; and

wherein connecting comprises connecting a second frame whose side facing the first substrate comprises a second frame portion of a second metal which is deposited on a first frame portion of the first metal,

the first and second metals being selected such that a first melting temperature of an alloy formed from the first and second metals is higher than a second melting temperature of the second metal.

32. :

The method as claimed in claim 30, wherein the first metal is copper and the second metal is tin.

33. :

The method as claimed in claim 30, wherein the first melting temperature is higher than 400°

C., and wherein the second melting temperature is lower than 350°

C.

34. :

The method as claimed in claim 25, wherein producing the first frame portion first of all comprises producing a diffusion layer from a metallicmaterial.

35. :

The method as claimed in claim 34, wherein the diffusion layer comprises a combination of one or several layers of the following materials;

Ti, TiN, TiW.

36. :

The method as claimed in claim 25, wherein producing the first frame comprises depositing an electrical solder melting at a predetermined temperature on a side of the frame which faces away from the surface of the substrate.

37. :

The method as claimed claim 25, wherein connecting comprises;

heating the first and second substrates for a first time period so as to create a preliminary connection;

following the first time span, transporting the preliminarily connected first and second substrates; and

heating the first and second substrates for a second time span so as to create a final connection.

38. :

The method as claimed in claim 25, wherein connecting additionally comprises;

coating the first and/or second frame(s) with an adhesive; and

preliminarily connecting the first and second frames by means of the adhesive so as to achieve relative mutual fixing of the first and second substrates.

39. :

The method as claimed in claim 25, wherein providing the first substrate comprises providing a substrate comprising a plurality of circuits integrated within the substrate.

40. :

The method as claimed in claim 25, wherein the second substrate is at least partly transmissive to wavelengths in the infrared spectral range.

41. :

The method as claimed in claim 25, wherein the second substrate comprises an integrated circuit.

42. :

A package comprising an electrical circuit, comprising;

a first substrate comprising an electrical circuit;

a second substrate arranged above a free volume opposite the first substrate;

a frame delimiting the free volume between the first and second substrates, said frame comprising a first metal on both sides of a boundary area arranged between the first and second substrates, the boundary area comprising an alloy of the first metal and a second metal;

a melting temperature of the second metal being lower than a melting temperature of the first metal and a melting temperature of the alloy.

43. :

The package as claimed in claim 42, wherein the first metal is copper and wherein the second metal is tin.

44. :

The package as claimed in claim 42, wherein the first substrate comprises an integrated circuit with a bolometer.

45. :

The package as claimed in claim 42, wherein the second substrate is at least partly transmissive to wavelengths in the infrared spectral range.

46. :

The package as claimed in claim 42, wherein the free volume comprises a lower gas density than the surroundings of the package.

47. :

The package as claimed in claim 42, wherein the free volume is enclosed in a gas-tight manner.

48. :

The package as claimed in claim 42, wherein the second substrate comprises a smaller surface area than the first substrate.