APPARATUS AND METHOD FOR SELF-REFRESHING DYNAMIC RANDOM ACCESS MEMORY CELLS
First Claim
1. A dynamic random access memory (DRAM) comprising:
- an array of DRAM cells arranged in rows by columns, each DRAM cell of the array being coupled to a wordline of a corresponding row and a bitline of a corresponding column; and
a refresh circuit for refreshing data stored in the DRAM cells coupled to wordlines of a first set of rows as main data and for overwriting assistant data into the DRAM cells coupled to wordlines of a second set of rows in a self-refresh mode, the assistant data being opposite data to the main data, each row of the second set being adjacent to each row of the first set.
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Abstract
A dynamic random access memory (DRAM) having DRAM cells coupled to wordlines and bitlines. In a self-refresh mode, the cells coupled with the even numbered rows retain main data previously stored therein and the assistant data, which is logically opposite to the main data, is overwritten into the cells coupled with the wordlines of the odd numbered rows. When the DRAM enters the self-refresh mode, a starting refresh address for the self-refresh mode is detected. If the detected starting refresh address does not match with a predetermined correct address set for the self-refresh operation mode, a dummy refresh cycle will be established in an entry-burst self-refresh period. During the dummy refresh cycle, a dummy refresh command is added to increment an internal row address counter that provides row addresses for self-refreshing the cells of the selected wordlines within the cell array.
18 Citations
19 Claims
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1. A dynamic random access memory (DRAM) comprising:
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an array of DRAM cells arranged in rows by columns, each DRAM cell of the array being coupled to a wordline of a corresponding row and a bitline of a corresponding column; and a refresh circuit for refreshing data stored in the DRAM cells coupled to wordlines of a first set of rows as main data and for overwriting assistant data into the DRAM cells coupled to wordlines of a second set of rows in a self-refresh mode, the assistant data being opposite data to the main data, each row of the second set being adjacent to each row of the first set.
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2. A method for self-refreshing a dynamic random access memory (DRAM) having cells arranged in rows and columns, each DRAM cell of the array being coupled to a wordline of a corresponding row and a bitline of a corresponding column, the method comprising:
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retaining data stored in the DRAM cells coupled to wordlines of a first set of rows, as main data, in a self-refresh mode; and overwriting assistant data into the DRAM cells coupled to wordlines of a second set of rows in the self-refresh mode, the assistant data being opposite data to the main data, each row of the second set being adjacent to each row of the first set.
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3. A semiconductor chip comprising a dynamic random access memory (DRAM) including:
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an array of DRAM cells arranged in rows by columns, each DRAM cell of the array being coupled to a wordline of a corresponding row and a bitline of a corresponding column; and refresh circuitry for refreshing data stored in the DRAM cells coupled to wordlines of a first set of rows as main data and for overwriting assistant data into the DRAM cells coupled to wordlines of a second set of rows in a self-refresh mode, the assistant data being opposite data to the main data, each row of the second set being adjacent to each row of the first set. - View Dependent Claims (4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification