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Linear phase interpolator and phase detector

  • US 20090103675A1
  • Filed: 04/15/2008
  • Published: 04/23/2009
  • Est. Priority Date: 10/19/2007
  • Status: Active Grant
First Claim
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1. An interpolating phase detector array for comparing a phase of a reference clock signal with phases of a set of K phase shifted clock signals and generating a phase error output signal, the interpolating phase detector array comprising:

  • a plurality of N phase detector columns, each column including;

    a plurality of M exclusive-OR (XOR) blocks, each block having;

    inputs for receiving the reference clock signal, receiving two of the phase shifted clock signals, receiving “

    coarse”

    control signals for enabling said received phase shifted clock signals; and

    a phase error output;

    a steerable current source having first and second current sink outputs for delivering a bias current to two distinct sets of XOR blocks, and having an input to receive a “

    fine”

    control signal for directing the bias current to one of said distinct sets; and

    a current output IOUT for delivering the phase error output signal formed by joining phase error outputs of the XOR blocks.

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