METHOD AND SYSTEM FOR IMPROVING DIELECTRIC FILM QUALITY FOR VOID FREE GAP FILL

• US 20090104789A1
• Filed: 10/22/2007
• Published: 04/23/2009
• Est. Priority Date: 10/22/2007
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Lubomirsky, Dimitry, Mallick, Abhijit Basu, Nemani, Srinivas D., Wang, Linlin, Zheng, Yi, Yuan, Zheng, Yieh, Ellie Y., Munro, Jeffrey C.
• Granted Patent: US 7,541,297 B2
• Time in Patent Office: Days
• US Class Current: 438/788
• CPC Class Codes: C23C 16/045 Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
• CPC Class Codes: C23C 16/24 Deposition of silicon only
• CPC Class Codes: C23C 16/401 containing silicon
• CPC Class Codes: C23C 16/56 After-treatment
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/76837 Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics

Abstract

A method of forming a silicon oxide layer on a substrate. The method includes providing a substrate and forming a first silicon oxide layer overlying at least a portion of the substrate, the first silicon oxide layer including residual water, hydroxyl groups, and carbon species. The method further includes exposing the first silicon oxide layer to a plurality of silicon-containing species to form a plurality of amorphous silicon components being partially intermixed with the first silicon oxide layer. Additionally, the method includes annealing the first silicon oxide layer partially intermixed with the plurality of amorphous silicon components in an oxidative environment to form a second silicon oxide layer on the substrate. At least a portion of amorphous silicon components are oxidized to become part of the second silicon oxide layer and unreacted residual hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.

Claims

1. A method of forming a silicon oxide layer on a substrate, the method comprising:

providing a substrate;

forming a first silicon oxide layer overlying at least a portion of the substrate, the first silicon oxide layer including residual water, hydroxyl groups, and carbon species;

exposing the first silicon oxide layer to a plurality of silicon-containing species, at least a portion of the plurality of silicon-containing species either reacting with at least a portion of the residual water and hydroxyl groups or being thermally decomposed to form a plurality of amorphous silicon components, the plurality of amorphous silicon components being partially intermixed with the first silicon oxide layer;

annealing the first silicon oxide layer partially intermixed with the plurality of amorphous silicon components in an oxidative environment to form a second silicon oxide layer on the substrate, wherein at least a portion of amorphous silicon components are oxidized to become part of the second silicon oxide layer, and wherein unreacted residual hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.

2. The method of claim 1, wherein the first silicon oxide layer is deposited using chemical vapor deposition of a silicon-containing precursor and an oxygen-containing precursor comprising atomic oxygen generated by remote plasma source.

3. The method of claim 1, wherein at least part of the silicon oxide layer is formed in a shallow trench isolation structure.

4. The method of claim 1, where the exposing the first silicon oxide layer to a plurality of silicon-containing species is performed at a pressure from about 10 mTorr to about 600 Torr, a temperature from about room temperature to about 900°

C., for a time period ranging from about 1 second to about 3 hours.

5. The method of claim 4, wherein the silicon-containing species comprises linear polysilanes (silane, disilane, and higher homologues), cyclic polysilanes (cyclopentasilane), dichlorosilane, or tetrachlorosilane.

6. The method of claim 4, wherein the plurality of silicon-containing species may be diluted with an inert gas.

7. The method of claim 1, wherein the oxidative environment comprises steam at about room temperature to about 900°

C., ozone at about room temperature to about 600°

C., molecular oxygen at about room temperature to about 900°

C., or atomic oxygen from a remote plasma source at about room temperature to about 600°

C.

8. The method of claim 1, wherein the annealing is performed in a rapid thermal process (RTP) chamber.

9. A method of forming a silicon oxide layer on a substrate, the method comprising:

providing a substrate;

depositing an amorphous silicon layer on at least a portion of the substrate;

depositing a first silicon oxide layer overlying the amorphous silicon layer, the first silicon oxide layer including hydroxyl groups and carbon species;

annealing the first silicon oxide layer overlying the amorphous silicon layer in an oxidative environment to form a second silicon oxide layer on the substrate, wherein the amorphous silicon layer is oxidized to become part of the second silicon oxide layer, the hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.

10. The method of claim 9 before the process of annealing further comprising alternating the process of forming an amorphous silicon layer and the process of forming a first silicon oxide layer overlying the amorphous silicon layer until a target thickness is reached.

11. The method of claim 9 wherein the amorphous silicon layer can be deposited by a thermal CVD process, a plasma CVD process, a plasma jet process, or a hot wire CVD process, using at least one of precursors selected from the group consisting of linear polysilanes (silane, disilane, and higher homologues), cyclic polysilanes (cyclopentasilane), alkyl silanes (methylsilane, trimethylsilane, tetramethylsilane), dichiorosilane, and tetrachiorosilane.

12. The method of claim 9 wherein the amorphous silicon layer comprises a silicon-rich self-assembled monolayer that is conformal to follow substrate structures including shallow trench isolation structure.

13. The method of claim 10 wherein the forming a first silicon oxide layer overlying the amorphous silicon layer in each alternating deposition cycle comprises depositing a 5 to 500 Angstroms silicon oxide film using chemical vapor deposition with a silicon-containing precursor and atomic oxygen generated by remote plasma source.

14. The method of claim 9 wherein the process of annealing is a rapid thermal process performed in an oxidative environment including one of follows:

steam from room temperature to 900°

C., ozone from room temperature to 600°

C., molecular oxygen from room temperature to 900°

C., or atomic oxygen from a remote plasma source at room temperature to 600°

C.

15. A method of forming a silicon oxide layer on a substrate, the method comprising:

providing a substrate in a semiconductor process chamber, the substrate including one or more trenches;

depositing a first silicon oxide layer including hydroxyl groups and carbon species on the substrate, the first silicon oxide layer at least partially filling the one or more trenches;

introducing a plurality of silicon-containing particles in the semiconductor process chamber, the plurality of silicon-containing particles being incorporated into the first silicon oxide layer;

forming a second silicon oxide layer by annealing the first silicon oxide layer including the plurality of silicon-containing particles in an oxidative environment, wherein the plurality of silicon-containing particles are oxidized and the hydroxyl groups and carbon species are substantially removed.

16. The method of claim 15 wherein the second silicon oxide layer is denser than the first silicon oxide layer, filling the one or more trenches with substantially free of voids.

17. The method of claim 15 wherein the one or more trenches may have aspect ratios of 11:

1 or higher.

18. The method of claim 15 wherein the first silicon oxide layer is deposited using chemical vapor deposition with a silicon-containing precursor and atomic oxygen generated by remote plasma source and at least partially fills one or more shallow trench isolation structures.

19. The method of claim 15 wherein the process of introducing the silicon-containing particles in the semiconductor process chamber comprises:

generating the silicon-containing particles from a silicon-rich precursor by a plasma;

depositing the plasma-generated silicon-containing particles on the first silicon oxide layer by turning off the plasma for a predetermined time period.

20. The method of claim 19 wherein the process of generating the silicon-containing particles may be performed in a remote plasma chamber, followed by delivering the silicon-containing particles into the semiconductor process chamber where the substrate overlaid with the first silicon oxide layer is provided.

21. The method of claim 19 wherein the depositing the plasma-generated silicon-containing particles can occur simultaneously with the forming the first silicon oxide layer in the semiconductor process chamber.

22. The method of claim 19 wherein the silicon-containing particles have diameters ranging from 10 to 50 nanometers.

23. The method of claim 15 wherein the process of annealing may be a rapid thermal process performed in a separate chamber with steam from room temperature to 900°

C., ozone from room temperature to 600°

C., molecular oxygen from room temperature to 900°

C., or atomic oxygen from a remote plasma source at room temperature to 600°

C.