Trench MOSFET with implanted drift region
First Claim
1. A trenched semiconductor power device comprising a plurality of trenched gates surrounded by source regions near a top surface of a semiconductor substrate encompassed in body regions, said trenched semiconductor power device further comprising:
- tilt-angle implanted drift regions surrounding said trenched gate below said body regions for on-resistance reduction, and preventing a degraded breakdown voltage with a thick oxide in lower portion of trench sidewall and bottom.
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Abstract
A method to manufacture a trenched semiconductor power device including a plurality of trenched gates surrounded by source regions near a top surface of a semiconductor substrate encompassed in body regions. The method for manufacturing the trenched semiconductor power device includes a step of carrying out a tilt-angle implantation through sidewalls of trenches to form drift regions surrounding the trenches at a lower portion of the body regions with higher doping concentration than the epi layer for Rds reduction, and preventing a degraded breakdown voltage due to a thick oxide in lower portion of trench sidewall and bottom. In an exemplary embodiment, the step of carrying out the tilt-angle implantation through the sidewalls of the trenches further includes a step of carrying out a tilt angle implantation with a tilt-angle ranging between 4 to 30 degrees.
13 Citations
22 Claims
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1. A trenched semiconductor power device comprising a plurality of trenched gates surrounded by source regions near a top surface of a semiconductor substrate encompassed in body regions, said trenched semiconductor power device further comprising:
tilt-angle implanted drift regions surrounding said trenched gate below said body regions for on-resistance reduction, and preventing a degraded breakdown voltage with a thick oxide in lower portion of trench sidewall and bottom. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method for manufacturing a trenched semiconductor power device comprising plurality of trenched gates surrounded by source regions near a top surface of a semiconductor substrate encompassed in body regions, said method comprising:
carrying out a tilt-angle implantation through sidewalls of trenches to form drift regions surrounding said trenches to provide drift regions below body regions for on-resistance reduction, and preventing a degraded breakdown voltage with a thick oxide in lower portion of trench sidewall and bottom. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
Specification