High Current Power Output Stage

• US 20090108909A1
• Filed: 09/21/2006
• Published: 04/30/2009
• Est. Priority Date: 09/29/2005
• Status: Active Grant

• Current Assignee: Continental Automotive GmbH (Continental AG)
• Original Assignee: VDO Automotive AG (Continental AG)
• Inventors: Weiss, Werner, Veit, Claudius
• Granted Patent: US 7,696,809 B2
• Time in Patent Office: Days
• US Class Current: 327/427
• CPC Class Codes: H02H 11/002 in case of inverted polarity or connection; with switching for obtaining correct connection
• CPC Class Codes: H02H 7/0838 with H-bridge circuit

Abstract

A high current end power stage (PA) comprises at least four power transistors (T), two electrical supply lines and at least a safety fuse (S). The at least four power transistors (T) have each a diode (D) which is blocked during normal operation of the respective power transistor (T). The two electrical supply lines couple the at least four power transistors (T) with a supply potential (Up) and a reference potential (Un) in such a way that two of the at least four power transistors (T) are at a time connected in series to each other, to be precise connected electrically between the supply potential (Up) and the reference potential (Un). The at least one safety fuse (S) is connected in series to the at least four power transistors (T) in at least one of the two electrical supply lines. The at least one safety fuse (S) can be triggered by a current which flows through the diode (D) of the at least four power transistors (T), said diode being then arranged in the direction of conduction (D), when the supply potential (Up) and reference potential (Un) are exchanged.

Claims

1-3. -3. (canceled)

4. A high current power output stage, comprising:

a common carrier;

at least four power transistors, each of the at least four transistors being disposed on a separate semiconductor chip, each of the at least four transistors having a diode which is turned off during normal operation of the respective power transistor, and each of the semiconductor chips being arranged on the common carrier;

two electrical supply lines coupling the at least four power transistors to a supply potential and a reference potential, at least one of the two electrical supply lines comprises at least one bonding wire, the at least four transistors being connected in series connected pairs between the two electrical supply lines so that each of said pairs is connected in parallel with the others of said pairs; and

at least one fusible link connected in series with said at least four power transistors in at least one of said two electrical power supply lines, said fusible link being configured to trigger in response to a current I which flows through the diodes of the at least four transistors when the supply potential and the reference potential are reversed.

5. The high current power output stage of claim 4, further comprising at least one additional diode electrically connected in parallel with the at least four power transistors such that said at least one additional diode is turned off during normal operation and is in the on state when the supply potential and the reference potential are reversed.

6. The high current power output stage of claim 4, wherein the current I is in the range of three to ten times greater than the current flowing through the fusible link during normal operation of the at least four power transistors.