Three-pin integrated synchronous rectifier and a flyback synchronous rectifying circuit

• US 20090109711A1
• Filed: 03/07/2008
• Published: 04/30/2009
• Est. Priority Date: 10/26/2007
• Status: Active Grant

• Current Assignee: Niko Semiconductor Co., Ltd
• Original Assignee: Niko Semiconductor Co., Ltd
• Inventors: Hsu, Ta-Ching
• Granted Patent: US 7,889,521 B2
• Time in Patent Office: Days
• US Class Current: 363/21.140
• CPC Class Codes: H02M 3/33592 having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A three-pin integrated synchronous rectifier is the synchronous rectifier chip where the quantity of connection pins is the smallest possible quantity. The three-pin integrated synchronous rectifier uses a control pin to receive a control signal used as a power bias voltage and a synchronous pulse to make the synchronous rectifier chip operate normally. The control signal is obtained from the output pin of an auxiliary winding via a diode. The other pins are respectively the drain pin and the source pin of an internal power transistor and are connected with the output winding and the voltage output terminal for transmitting the power of the transformer to supply current for the loading.

Claims

1. A three-pin integrated synchronous rectifier, having a first electric connection point, a second electric connection point and a third electric connection point, comprising:

a power transistor having a first output/input terminal, a second output/input terminal and a control terminal, wherein the first output/input terminal is coupled with the first electric connection point, and the second output/input terminal is coupled with the second electric connection point; and

a synchronous rectifying control circuit for controlling the electric status of the power transistor and having an input control terminal, two detection terminals, and an output terminal, wherein the input control terminal is coupled with the third electric connection point, the two detection terminals respectively are coupled with the first output/input terminal and the second output/input terminal of the power transistor, and the output terminal is coupled with the control terminal of the power transistor;

wherein, the synchronous rectifying control circuit turns the power transistor on when the synchronous rectifying control circuit receives a synchronous signal at the input control terminal, and the synchronous rectifying control circuit turns the power transistor off when the synchronous rectifying control circuit detects that a current flowing through the power transistor is smaller than a pre-determined current by the two detection terminals.

2. The three-pin integrated synchronous rectifier as claimed in claim 1, wherein the synchronous rectifying control circuit comprises;

a detection circuit coupled with the first output/input terminal and the second output/input terminal to form the two detection terminals and used for detecting a current flowing through the power transistor, wherein the detection circuit outputs a turn-off signal when the current is smaller than the pre-determined current;

a delay circuit coupled with the detection circuit and outputting a confirm signal when the turn-off signal lasts a first pre-determined period; and

a driver coupled with the delay circuit and the input control terminal, wherein the driver turns the power transistor on when the driver receives the synchronous signal at the input control terminal, and the driver turns the power transistor off when the driver receives the confirm signal.

3. The three-pin integrated synchronous rectifier as claimed in claim 2, wherein the detection circuit comprises a first bipolar junction transistor and a second bipolar junction transistor, the bases of the two bipolar junction transistors are connected with each other, the collector of the first bipolar junction transistor and the emitter of the second bipolar junction transistor are coupled with the two detection terminals, the base and the emitter of the first bipolar junction transistor are connected with each other and are coupled with the input control terminal, and the collector of the second bipolar junction transistor is coupled with the delay circuit.

4. The three-pin integrated synchronous rectifier as claimed in claim 2, wherein the delaying circuit is a debouncing circuit.

5. The three-pin integrated synchronous rectifier as claimed in claim 2, wherein the delaying circuit comprises:

a first transistor coupled with the detection circuit;

at least one capacitor coupled with the first transistor; and

a second transistor coupled with the least one capacitor and the driver, wherein the second transistor is in the turn-on status or the turn-off status according to the voltage of the least one capacitor;

wherein the first transistor causes the capacitor to be charged or discharged to turn the second transistor off when the turn-off signal is not issued, and to turn the second transistor on to generate the confirm signal when the turn-off signal is issued.

6. The three-pin integrated synchronous rectifier as claimed in claim 2, wherein the delaying circuit further comprises at least one resistor coupling the least one capacitor to a reference voltage, the delaying circuit gradually charges or discharges the capacitor with a second pre-determined period to turn the second transistor off when the second transistor is turned on.

7. A flyback synchronous rectifying circuit, comprising:

a flyback converter having a first power transistor and a transformer having a primary side and a secondary side, wherein the first power transistor is coupled with the primary side;

an output capacitor coupled with the secondary side of the transformer;

a three-pin integrated synchronous rectifier having a first electric connection point, a second electric connection point and a third electric connection point, wherein the first electric connection point and the second electric connection point respectively are coupled with the secondary side of the transformer and the output capacitor, and the third electric connection point is used for receiving a synchronous signal;

an output detection unit coupled with the secondary side of the transformer for detecting the electric status of the secondary side to generate an output detection signal;

an electric isolation unit coupled with the output detection unit for outputting the output detection signal with electric isolation, and

a primary PWM controller coupled with the flyback converter and the electric isolation unit for turning on or turning off the first power transistor according to the output detection signal;

wherein, the three-pin integrated synchronous rectifier is turned on for conducting an output current when receiving the synchronous signal, and the three-pin integrated synchronous rectifier is turned off when the output current is smaller than a pre-determined value.

8. The flyback synchronous rectifying circuit as claimed in claim 7, wherein the three-pin integrated synchronous rectifier comprises:

a second power transistor having a first output/input terminal, a second output/input terminal and a control terminal, wherein the first output/input terminal is coupled with the first electric connection point, and the second output/input terminal is coupled with the second electric connection point; and

a synchronous rectifying control circuit for controlling the electric status of the second power transistor and having an input control terminal, two detection terminals, and an output terminal, wherein the input control terminal is coupled with the third electric connection point, the two detection terminals respectively are coupled with the first output/input terminal and the second output/input terminal of the second power transistor, and the output terminal is coupled with the control terminal of the second power transistor;

wherein, the synchronous rectifying control circuit turns the power transistor on when the synchronous rectifying control circuit receives a synchronous signal at the input control pin, and the synchronous rectifying control circuit turns the power transistor off when the synchronous rectifying control circuit detects that a current flowing through the power transistor is smaller than a pre-determined current by the two detection pins.

9. The flyback synchronous rectifying circuit as claimed in claim 8, wherein the synchronous rectifying control circuit comprises;

a detection circuit coupled with the first output/input terminal and the second output/input terminal to form the two detection terminals and used for detecting a current flowing through the second power transistor, wherein the detection circuit outputs a turn-off signal when the current is smaller than the pre-determined current;

a delay circuit coupled with the detection circuit and outputting a confirm signal when the turn-off signal lasts a first pre-determined period; and

a driver coupled with the delay circuit and the input control terminal, wherein the driver turns the second power transistor on when the driver receives the synchronous signal at the input control terminal, and the driver turns the power transistor off when the driver receives the confirm signal.

10. The flyback synchronous rectifying circuit as claimed in claim 9, wherein the detection circuit comprises a first bipolar junction transistor and a second bipolar junction transistor, the bases of the two bipolar junction transistors are connected with each other, the collector of the first bipolar junction transistor and the emitter of the second bipolar junction transistor are coupled with the two detection terminals, the base and the emitter of the first bipolar junction transistor are connected with each other and are coupled with the input control terminal, and the collector of the second bipolar junction transistor is coupled with the delay circuit.

11. The flyback synchronous rectifying circuit as claimed in claim 9, wherein the delaying circuit is a debouncing circuit.

12. The flyback synchronous rectifying circuit as claimed in claim 9, wherein the delaying circuit comprises:

a first transistor coupled with the detection circuit;

at least one capacitor coupled with the first transistor; and

a second transistor coupled with the least one capacitor and the driver, wherein the second transistor is in the turn-on status or the turn-off status according to the voltage of the least one capacitor;

wherein the first transistor causes the capacitor to be charged or discharged to turn the second transistor off when the turn-off signal is not issued, and to turn the second transistor on to generate the confirm signal when the turn-off signal is issued.

13. The flyback synchronous rectifying circuit as claimed in claim 9, wherein the delaying circuit further comprises at least one resistor coupling the capacitor to a reference voltage, the delaying circuit gradually charges or discharges the capacitor for a second pre-determined period to turn the second transistor off when the first transistor is in the turn-on status.

14. The flyback synchronous rectifying circuit as claimed in claim 7, wherein the primary side of the transformer has a primary side winding and a primary auxiliary winding, the primary side winding is connected with an input power of the flyback synchronous rectifying circuit and the first power transistor, the primary auxiliary winding is coupled with the primary PWM controller for providing electric power to drive the primary PWM controller.

15. The flyback synchronous rectifying circuit as claimed in claim 7, wherein the secondary side of the transformer has a secondary side winding and a secondary auxiliary winding, the secondary auxiliary winding is coupled with the third electric connection point of the three-pin integrated synchronous rectifier via a diode for generating the synchronous signal according the turn-on/turn-off status of the first power transistor.

16. The flyback synchronous rectifying circuit as claimed in claim 7, wherein the output detection unit is an error amplifier.

17. The flyback synchronous rectifying circuit as claimed in claim 7, wherein the electric isolation unit is a photo coupler.