METHOD AND APPARATUS FOR MONITORING PROCESSOR INTEGRITY IN A DISTRIBUTED CONTROL MODULE SYSTEM FOR A POWERTRAIN SYSTEM
First Claim
1. A method for monitoring a main control module operative to command first and second motor control processors of a hybrid powertrain system, the method comprising:
- signally connecting a programmable logic device to the main control module and the first and second motor control processors;
communicating a first seed signal from the programmable logic device to the main control module;
determining an invalid key signal in the main control module in response to the first seed signal; and
communicating the invalid key signal to the programmable logic device.
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Abstract
A method for monitoring a main control module operative to command first and second motor control processors of a hybrid powertrain system includes signally connecting a programmable logic device to the main control module and the first and second motor control processors, communicating a first seed signal from the programmable logic device to the main control module, and determining an invalid key signal in the main control module in response to the first seed signal. The invalid key signal is communicated to the programmable logic device.
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Citations
12 Claims
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1. A method for monitoring a main control module operative to command first and second motor control processors of a hybrid powertrain system, the method comprising:
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signally connecting a programmable logic device to the main control module and the first and second motor control processors; communicating a first seed signal from the programmable logic device to the main control module; determining an invalid key signal in the main control module in response to the first seed signal; and communicating the invalid key signal to the programmable logic device. - View Dependent Claims (2, 3)
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4. A method for monitoring a main control module and first and second motor control processors operative to control first and second torque actuators of a hybrid powertrain system, the method comprising:
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implementing a programmable logic device; directly signally connecting a discrete output from the programmable logic device to the main control module and to each of the motor control processors; signally connecting the main control module and the programmable logic device via a first communications bus; signally connecting each of the main control module and the first motor control processor to a serial communications bus; communicating a seed signal from the programmable logic device to the main control module via the first communications bus; determining a key signal in the main control module based upon the seed signal; communicating the key signal to the programmable logic device via the first communications bus; determining a state of the discrete output in the programmable logic device based upon the key signal; directly communicating the state of the discrete output from the programmable logic device to the main control module and to each of the motor control processors via electric cables; and transmitting a signal determined based upon the state of the discrete output from the first motor control processor to the serial communications bus. - View Dependent Claims (5, 6, 7, 8, 9, 10)
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11. A method for monitoring a control module system including a main control module and first and second motor control processors operative to control torque actuators of a hybrid powertrain system, the method comprising:
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directly signally connecting a programmable logic device to a main control module; detecting a key-off period for the hybrid powertrain system; communicating a test in progress signal from the main control module to the first and second control modules; communicating a valid seed signal from the programmable logic device to the main control module; selecting and communicating an invalid key signal from the main control module to the programmable logic device in response to the valid seed signal; determining and communicating a discrete state from the programmable logic device based upon the valid seed signal and the invalid key signal during the test in progress signal. - View Dependent Claims (12)
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Specification