METHODS AND SYSTEMS FOR SEMICONDUCTOR TESTING USING REFERENCE DICE
First Claim
Patent Images
1. A method of semiconductor testing, comprising:
- testing at least one die in a wafer or lot in a current test socket;
while said wafer or lot is being processed in said current test socket and based on data relating to said testing, changing or maintaining workflow related information in order to facilitate adjusting of a test workflow; and
adjusting said test workflow.
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Abstract
Methods and systems of semiconductor testing where reference dice and non-reference dice in a wafer and/or lot are tested differently. In one embodiment of the invention, geography, lithography exposure, other characteristics, performance and/or behavior are taken into account when selecting reference dice, thereby improving the likelihood that the response of reference dice to testing is well representative of the wafer and/or lot. In one embodiment, based on data from the testing of reference dice, the test flow for non-reference dice and/or other testing may or may not be adjusted.
53 Citations
22 Claims
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1. A method of semiconductor testing, comprising:
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testing at least one die in a wafer or lot in a current test socket; while said wafer or lot is being processed in said current test socket and based on data relating to said testing, changing or maintaining workflow related information in order to facilitate adjusting of a test workflow; and adjusting said test workflow. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A system for semiconductor testing, comprising:
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means for a testing at least one die in a wafer or lot in a current test socket; means for changing or maintaining workflow related information while said wafer or lot is being processed in said current test socket and based on data relating to said testing, in order to facilitate adjusting of a test workflow; and means for adjusting said test workflow. - View Dependent Claims (19, 20, 21)
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22. A computer program product comprising a computer useable medium having computer readable program code embodied therein of semiconductor testing, the computer program product comprising:
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computer readable program code for causing the computer to test at least one die in a wafer or lot in a current test socket; computer readable program code for causing the computer while said wafer or lot is being processed in said current test socket and based on data relating to said testing to change or maintain workflow related information in order to facilitate adjusting of a test workflow; and computer readable program code for causing the computer to adjust said test workflow.
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Specification