Method and Apparatus to Improve Performance in a Multicarrier Mimo Channel Using the Hadamard Transform

• US 20090122897A1
• Filed: 07/20/2006
• Published: 05/14/2009
• Est. Priority Date: 07/20/2006
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Chernyshev, Vladislav A., Belogolovy, Andrey V.
• Granted Patent: US 7,889,806 B2
• Time in Patent Office: Days
• US Class Current: 375/267
• CPC Class Codes: H04L 1/0612 Space-time modulation
• CPC Class Codes: H04L 1/0668 Orthogonal systems, e.g. using Alamouti codes
• CPC Class Codes: H04L 25/0204 of multiple channels
• CPC Class Codes: H04L 25/0224 using sounding signals
• CPC Class Codes: H04L 5/026 using code division

Abstract

The Hadamard transform is used to spread data within data blocks in a multicarrier MIMO system, before transmission. In this manner, the negative effects caused by the clustering of bad subcarriers (i.e., subcarriers having a low transmission coefficient due to fading) may be reduced. In at least one embodiment, a MAP-type detection scheme is used in the receiver to extract bit reliabilities from the received signals.

Claims

1. A method comprising:

generating symbols from a stream of input bits in accordance with a predetermined modulation scheme;

grouping said symbols into blocks of size M;

Hadamard transforming each block, using a Hadamard matrix of size M, to generate a transformed block; and

transmitting said transformed blocks into a multicarrier MIMO channel.

2. The method of claim 1, further comprising:

space-time coding said transformed blocks before transmission.

3. The method of claim 1, wherein:

said input bits are FEC encoded bits.

4. The method of claim 1, wherein:

transmitting said transformed blocks includes mapping symbols within said blocks to subcarriers, inserting pilot tones, and performing an inverse discrete Fourier transform on said subcarriers.

5. The method of claim 1, wherein:

grouping said symbols into blocks of size M includes assigning symbols associated with a first M adjacent subcarriers to a first block and assigning symbols associated with a second M adjacent subcarriers to a second block.

6. The method of claim 1, wherein:

grouping said symbols into blocks of size M includes assigning a symbol associated with a first subcarrier to a first block, assigning a symbol associated with a second subcarrier to a second block, said second subcarrier being adjacent to said first subcarrier, and assigning a symbol associated with a third subcarrier to a third block, said third subcarrier being adjacent to said second subcarrier.

7. An apparatus comprising:

a modulator to generate a number of symbols from a stream of data bits;

a Hadamard transformer to group said symbols into blocks of size M and to perform a Hadamard transform on each of said blocks to generate transformed blocks; and

a mapper to map symbols of said transformed blocks to a plurality of subcarriers.

8. The apparatus of claim 7, further comprising:

at least two transmit antennas to transmit said transformed blocks into a multicarrier MIMO channel.

9. The apparatus of claim 8, further comprising:

a space-time coder to space time code said symbols of said transformed blocks before transmission from said at least two transmit antennas.

10. The apparatus of claim 8, further comprising:

an inverse discrete Fourier transformer for each transmit antenna to convert said symbols of said transformed blocks from a frequency domain representation to a time domain representation for transmission from a corresponding transmit antenna.

11. A method comprising:

receiving a vector Y from a multicarrier MIMO channel, said vector Y having a plurality of symbols;

grouping said symbols of said vector Y into multiple blocks of size M, where M is the size of a Hadamard matrix used to Hadamard transform source blocks in a corresponding transmitter; and

performing the following for a first block in said multiple blocks;

calculating an estimated received vector for each possible vector of length M of source symbols;

generating a list with said estimated received vectors; and

using said list to generate bit reliabilities for use in decoding said vector Y.

12. The method of claim 11, wherein using said list includes performing the following for a first bit position of a bit sequence:

first examining said list to find an estimated received vector with a lowest Euclidean distance (d₀) to said first block among listed vectors having a zero in said first bit position of a corresponding source bit sequence;

second examining said list to find an estimated received vector with a lowest Euclidean distance (d₁) to said first block among listed vectors having a one in said first bit position of a corresponding source bit sequence; and

calculating a bit reliability for said first bit position using d₀ and d₁.

13. The method of claim 12, wherein using said list further includes:

repeating first examining, second examining, and calculating for bit positions of said bit sequence other than said first bit position.

14. The method of claim 11, further comprising:

performing calculating, generating, and using for blocks in said multiple blocks other than said first block.

15. The method of claim 11, wherein:

calculating an estimated received vector includes using channel estimates for subcarriers associated with said first block.

16. The method of claim 11, wherein:

calculating a bit reliability for said first bit position includes calculating a difference between d₀ and d₁.

17. An apparatus comprising:

a combiner to combine signals received by multiple receive antennas from a multicarrier MIMO channel to generate a received vector Y having a plurality of symbols; and

a demapper/demodulator including;

logic to divide said symbols of said received vector Y into multiple blocks of length M, where M is the size of a Hadamard matrix used in a corresponding transmitter; and

logic to, for a first block in said multiple blocks, calculate an estimated received vector for each possible vector of length M of source symbols, generate a list with said estimated received vectors, and use said list to generate bit reliabilities.

18. The apparatus of claim 17, wherein:

said demapper/demodulator further includes logic to, for other blocks in said multiple blocks, calculate an estimated received vector for each possible vector of length M of source symbols, generate a list with said estimated received vectors, and use said list to generate bit reliabilities.

19. The apparatus of claim 17, wherein:

said logic to use said list to generate bit reliabilities includes;

first logic to examine said list to find an estimated received vector with a lowest Euclidean distance (d₀) to said first block among listed vectors having a zero in a first bit position of corresponding source bit sequences;

second logic to examine said list to find an estimated received vector with a lowest Euclidean distance (d₁) to said first block among listed vectors having a one in said first bit position of corresponding source bit sequences; and

third logic to calculate a bit reliability for said first bit position using d₀ and d₁.

20. The apparatus of claim 19, wherein:

said third logic includes logic to determine a difference between d₀ and d₁.