STRESS-GENERATING SHALLOW TRENCH ISOLATION STRUCTURE HAVING DUAL COMPOSITION
First Claim
1. A semiconductor structure comprising:
- an active area comprising a semiconductor material and located in a semiconductor substrate;
a first shallow trench isolation portion laterally abutting lengthwise sidewalls of a middle portion of said active area; and
a set of two second shallow trench isolation portions, each laterally abutting lengthwise sidewalls and widthwise sidewalls of end portions of said active area, wherein said first shallow trench isolation portion and said set of said second shallow trench isolation portions comprise different materials.
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Accused Products
Abstract
A shallow trench isolation structure containing a first shallow trench isolation portion comprising the first shallow trench material and a second shallow trench isolation portion comprising the second shallow trench material is provided. A first biaxial stress on at least one first active area and a second bidirectional stress on at least one second active area are manipulated separately to enhance charge carrier mobility in middle portions of the at least one first and second active areas by selection of the first and second shallow trench materials as well as adjusting the type of the shallow trench isolation material that each portion of the at least one first active area and the at least one second active area laterally abut.
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Citations
20 Claims
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1. A semiconductor structure comprising:
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an active area comprising a semiconductor material and located in a semiconductor substrate; a first shallow trench isolation portion laterally abutting lengthwise sidewalls of a middle portion of said active area; and a set of two second shallow trench isolation portions, each laterally abutting lengthwise sidewalls and widthwise sidewalls of end portions of said active area, wherein said first shallow trench isolation portion and said set of said second shallow trench isolation portions comprise different materials. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A semiconductor structure comprising:
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a first active area and a second active area, each comprising a semiconductor material and located in a semiconductor substrate and disjoined from each other; a first shallow trench isolation portion laterally abutting lengthwise sidewalls and widthwise sidewalls of end portions of said first active area and laterally abutting lengthwise sidewalls of a middle portion of said second active area; and a second shallow trench isolation portion laterally abutting lengthwise sidewalls and widthwise sidewalls of end portions of said second active area and laterally abutting lengthwise sidewalls of a middle portion of said first active area. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
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15. A method of fabricating a semiconductor structure comprising:
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forming an etch stop layer on a semiconductor substrate; forming a shallow trench surrounding a first active area and a second active area in said semiconductor substrate; filling said shallow trench with a first shallow trench isolation material having a first composition and first stress-generating properties; forming first cavities laterally abutting lengthwise sidewalls and widthwise sidewalls of end portions of said second active area and second cavities laterally abutting lengthwise sidewalls of a middle portion of said first active area; and filling said first cavities and second cavities with a second shallow trench isolation material having a second composition and second stress-generating properties, wherein said first stress-generating properties and second stress-generating properties are different. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification