MULTILAYER DIELECTRIC SUBSTRATE AND SEMICONDUCTOR PACKAGE

• US 20090127674A1
• Filed: 01/16/2009
• Published: 05/21/2009
• Est. Priority Date: 06/28/2004
• Status: Active Grant

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: SUZUKI, Takuya
• Granted Patent: US 7,964,937 B2
• Time in Patent Office: Days
• US Class Current: 257/659
• CPC Class Codes: H01L 2223/6633 Transition between different waveguide types
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/45014 Ribbon connectors, e.g. rectangular cross-section
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 23/04 characterised by the shape of the container or parts, e.g. caps, walls
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/12036 PN diode
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/1423 : Monolithic Microwave Integrated Circuit [MMIC]
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/1517 : Multilayer substrate
• CPC Class Codes: H01L 2924/1616 : Cavity shape
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/19039 : impedance transition between different types of wave guides
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01P 1/162 : absorbing spurious or unwanted modes of propagation

Abstract

A multilayer dielectric substrate that mounts a semiconductor device in a cavity formed on a substrate. The multilayer dielectric substrate includes an opening formed in a surface-layer grounding conductor on the substrate in the cavity, and an impedance transformer, with a length of about ¼ of an in-substrate effective wavelength of a signal wave, electrically connected through the opening to the cavity. The multilayer dielectric substrate further includes a short-circuited end dielectric transmission line with a length of about ¼ of the in-substrate effective wavelength of the signal wave, a coupling opening formed on an inner-layer grounding conductor in a connecting section of the impedance transformer and the dielectric transmission line, and a resistor formed in the coupling opening.

Claims

1. A multilayer dielectric substrate that includes a cavity on a dielectric substrate, and a semiconductor device in the cavity, the cavity being an electromagnetically shielded space, the multilayer dielectric substrate comprising:

a grounding conductor that is a part of the electromagnetic shield, and covers substantially the entire dielectric substrate in the cavity;

an opening that is located at a part of the grounding conductor;

an impedance transformer that is located in the dielectric substrate, electrically connected to the cavity through the opening, and has a length an odd number times as long as about ¼

of an in-substrate effective wavelength of a signal wave;

a dielectric transmission line with an end short that is located in the dielectric substrate;

a coupling opening that is located on an internal grounding conductor in a connecting section of the impedance transformer and the dielectric transmission line; and

a resistor that is located at a position in the dielectric transmission line distant from the end short by a length an odd number times as long as about ¼

of the in-substrate effective wavelength of the signal wave.

4. The multilayer dielectric substrate according to claim 1, wherein the opening is located at any one of a side end of the cavity and a position distant from the side end by a length an integer times as long as about ½

of a wavelength of the signal wave.

9. The multilayer dielectric substrate according to claim 1, wherein the opening, the impedance transformer, the dielectric transmission line, the coupling opening, and the resistor are located around where the semiconductor device is mounted.

10. The multilayer dielectric substrate according to claim 1, wherein the dielectric transmission line includes the internal grounding conductor, a plurality of ground via-holes, and dielectrics in the internal grounding conductor and the ground via-holes.

13. The multilayer dielectric substrate according to claim 1, wherein the impedance transformer includes the internal grounding conductor, a plurality of ground via-holes, and dielectrics in the internal grounding conductor and the ground via-holes.

14. A semiconductor package comprising:

the multilayer dielectric substrate according to claim 1; and

an electromagnetic shielding member that forms the cavity.

17. A semiconductor package comprising:

a semiconductor device;

the multilayer dielectric substrate according to claim 1 that includes thereon the semiconductor device; and

an electromagnetic shielding member that forms the cavity for housing the semiconductor device.

2. A multilayer dielectric substrate that includes a cavity on a dielectric substrate, and a semiconductor device in the cavity, the cavity being an electromagnetically shielded space, the multilayer dielectric substrate comprising:

a grounding conductor that is a part of the electromagnetic shield, and covers substantially the entire dielectric substrate in the cavity;

an opening that is located at a part of the grounding conductor;

a dielectric transmission line with an end short that is located in the dielectric substrate, electrically connected to the cavity through the opening, and has a length an odd number times as long as about ¼

of an in-substrate effective wavelength of a signal wave; and

a resistor that is located on the opening.

5. The multilayer dielectric substrate according to claim 2, wherein the opening is located at any one of a side end of the cavity and a position distant from the side end by a length an integer times as long as about ½

of a wavelength of the signal wave.

7. The multilayer dielectric substrate according to claim 2, wherein the opening, the dielectric transmission line, and the resistor are located around where the semiconductor device is mounted.

11. The multilayer dielectric substrate according to claim 2, wherein the dielectric transmission line includes the internal grounding conductor, a plurality of ground via-holes, and dielectrics in the internal grounding conductor and the ground via-holes.

15. A semiconductor package comprising:

the multilayer dielectric substrate according to claim 2; and

an electromagnetic shielding member that forms the cavity.

18. A semiconductor package comprising:

a semiconductor device;

the multilayer dielectric substrate according to claim 2 that includes thereon the semiconductor device; and

an electromagnetic shielding member that forms the cavity for housing the semiconductor device.

3. A multilayer dielectric substrate that includes a cavity on a dielectric substrate, and a semiconductor device in the cavity, the cavity being an electromagnetically shielded space, the multilayer dielectric substrate comprising:

a grounding conductor that is a part of the electromagnetic shield, and covers substantially the entire dielectric substrate in the cavity;

an opening that is located at a part of the grounding conductor;

a dielectric transmission line with an end short that is located in the dielectric substrate, and electrically connected to the cavity through the opening; and

a resistor that is located at a position in the dielectric transmission line distant from the short-circuited end by a length an odd number times as long as about ¼

of an

in-substrate effective wavelength of a signal wave.

6. The multilayer dielectric substrate according to claim 3, wherein the opening is located at any one of a side end of the cavity and a position distant from the side end by a length an integer times as long as about ½

of a wavelength of the signal wave.

8. The multilayer dielectric substrate according to claim 3, wherein the opening, the dielectric transmission line, and the resistor are located around where the semiconductor device is mounted.

12. The multilayer dielectric substrate according to claim 3, wherein the dielectric transmission line includes the internal grounding conductor, a plurality of ground via-holes, and dielectrics in the internal grounding conductor and the ground via-holes.

16. A semiconductor package comprising:

the multilayer dielectric substrate according to claim 3; and

an electromagnetic shielding member that forms the cavity.

19. A semiconductor package comprising:

a semiconductor device;

the multilayer dielectric substrate according to claim 3 that includes thereon the semiconductor device; and

an electromagnetic shielding member that forms the cavity for housing the semiconductor device.