Multi-bit Per Stage Pipelined Analog to Digital Converters
First Claim
1. A pipelined analog to digital converter, wherein the pipelined analog to digital converter comprises:
- an analog to digital converter stage, wherein the analog to digital converter stage includes;
a multi-bit analog to digital converter, wherein the multi-bit analog to digital converter includes a particular number of comparators; and
a digital to analog converter, wherein the digital to analog converter is controlled by outputs from the particular number of comparators, wherein the digital to analog converter includes a residue amplifier with a feedback capacitance and an input capacitance, and wherein the input capacitance includes the particular number of input capacitors; and
wherein the resolution of the analog to digital converter stage is selected to reduce the number of capacitor units.
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Abstract
Various embodiments of the present invention provide systems and circuits that provide for conversion of analog signals to digital signals. For example, various embodiments of the present invention provide pipelined analog to digital converters. Such converters include a sub-converter and a residue amplifier. The sub-converter receives an analog input, and provides a digital representation of the analog input including a number of bits. A gain of the residue amplifier is controlled by selectably setting a group of switches. Each of the number of bits output from the sub-converter electrically controls a respective one of the switches.
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Citations
21 Claims
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1. A pipelined analog to digital converter, wherein the pipelined analog to digital converter comprises:
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an analog to digital converter stage, wherein the analog to digital converter stage includes; a multi-bit analog to digital converter, wherein the multi-bit analog to digital converter includes a particular number of comparators; and a digital to analog converter, wherein the digital to analog converter is controlled by outputs from the particular number of comparators, wherein the digital to analog converter includes a residue amplifier with a feedback capacitance and an input capacitance, and wherein the input capacitance includes the particular number of input capacitors; and wherein the resolution of the analog to digital converter stage is selected to reduce the number of capacitor units. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 21)
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2. (canceled)
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11. A pipelined analog to digital converter, wherein the pipelined analog to digital converter comprises:
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a first analog to digital converter stage, wherein the first analog to digital converter stage provides a first multi-bit digital output and a first analog residue, and wherein the first analog to digital converter stage includes; a first multi-bit analog to digital converter, wherein the first multi-bit analog to digital converter includes a first particular number of comparators, and drives the first multi-bit digital output; and a first digital to analog converter, wherein the first digital to analog converter is directly controlled by outputs from the first particular number of comparators, wherein the first digital to analog converter includes a residue amplifier with a feedback capacitance and an input capacitance, and wherein the input capacitance includes the particular number of input capacitors; and wherein the resolution of the first analog to digital converter stage is selected to reduce the number of capacitor units; a second analog to digital converter stage, wherein the second analog to digital converter stage provides a second multi-bit digital output and a second analog residue, wherein an input of the second analog to digital converter stage is driven by the first analog residue, and wherein the second analog to digital converter stage includes; a second multi-bit analog to digital converter, wherein the second multi-bit analog to digital converter includes a second particular number of comparators, and drives the second multi-bit digital output; and a second digital to analog converter, wherein the second digital to analog converter is directly controlled by outputs from the second particular number of comparators. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. An electronic device, wherein the electronic device comprises:
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an analog signal; a digital signal; a pipelined analog to digital converter, wherein the pipelined analog to digital converter receives the analog signal and provides the digital signal, and wherein the pipelined analog to digital converter comprises; a first analog to digital converter stage, wherein the first analog to digital converter stage provides a first multi-bit digital output and a first analog residue, wherein an input of the first analog to digital converter stage is driven by the analog signal, and wherein the first analog to digital converter stage includes; a first multi-bit analog to digital converter, wherein the first multi-bit analog to digital converter includes a first particular number of comparators, and drives the first multi-bit digital output; and a first digital to analog converter, wherein the first digital to analog converter is directly controlled by outputs from the first particular number of comparators, wherein the first digital to analog converter includes a residue amplifier with a feedback capacitance and an input capacitance, and wherein the input capacitance includes the particular number of input capacitors; and wherein the resolution of the first analog to digital converter stage is selected to reduce the number of capacitor units; a second analog to digital converter stage, wherein the second analog to digital converter stage provides a second multi-bit digital output and a second analog residue, wherein an input of the second analog to digital converter stage is driven by the first analog residue, and wherein the second analog to digital converter stage includes; a second multi-bit analog to digital converter, wherein the second multi-bit analog to digital converter includes a second particular number of comparators, and drives the second multi-bit digital output; and a second digital to analog converter, wherein the second digital to analog converter is directly controlled by outputs from the second particular number of comparators; and wherein the digital output is a combination of the first multi-bit digital output and the second multi-bit digital output. - View Dependent Claims (19, 20)
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Specification