Computing system supporting parallel 3D graphics processes based on the division of objects in 3D scenes

• US 20090128550A1
• Filed: 08/29/2008
• Published: 05/21/2009
• Est. Priority Date: 11/19/2003
• Status: Abandoned Application

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Google LLC (Alphabet Inc.)
• Inventors: Bakalash, Reuven, Leviathan, Yaniv
• Application Number:
  US12/231,295
• Publication Number:
  US 20090128550A1
• Time in Patent Office: Days
• US Class Current: 345/419
• CPC Class Codes: G06F 2209/501 Performance criteria
• CPC Class Codes: G06F 9/5044 considering hardware capabilities
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G06T 2210/52 Parallel processing
• CPC Class Codes: G09G 5/14 Display of multiple viewports
• CPC Class Codes: G09G 5/363 Graphics controllers
• CPC Class Codes: G09G 5/397 Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay G09G5/02 takes precedence

Abstract

A computing system supporting parallel 3D graphics processes based on the division of objects in 3D scenes. The computing system includes (i) a CPU memory space for storing one or more graphics-based applications and a graphics library for generating graphics commands and data (GCAD) during the run-time of the graphics-based applications, (ii) one or more CPUs for executing the graphics-based applications, and (iii) parallel graphics processing system (PGPS) having multiple graphics processing pipelines (GPPLs), supporting object division based parallelism among the GPPLs, and performing pixel depth value comparison within each GPPL using a common global depth map (GDM) during pixel rendering processing.

Claims

1. A computing system supporting parallel 3D graphics processes based on the division of objects in 3D scenes, said computing system comprising:

CPU memory space for storing one or more graphics-based applications and a graphics library for generating graphics commands and data (GCAD) during the run-time of the graphics-based applications;

one or more CPUs for executing said graphics-based applications; and

a parallel graphics processing system (PGPS) having multiple graphics processing pipelines (GPPLs), supporting object division based parallelism among said GPPLs, and performing pixel depth value comparison within each GPPL using a common global depth map (GDM) during pixel rendering processing.

2. The computing system of claim 1, wherein said parallel graphics processing system further includes:

(i) a decomposition module for supporting the decomposition stage of parallel operation;

(ii) a distribution module for supporting the distribution stage of parallel operation;

(iii) a recomposition module for supporting the recomposition stage of parallel operation; and

(iv) a rendering module for supporting the rendering stage of parallel operation.

3. The computing system of claim 2, wherein during operation,

(i) said decomposition module divides the stream of graphic commands and data (GCAD) according to said object-division mode of parallel operation;

(ii) said distribution module distributes graphic commands and data (GCAD) to said GPPLs;

(iii) said rendering module generates complementary-type partial color images according to a parallel multi-pass graphics processing method; and

(iv) said recomposition module uses inter-GPU communication to transfer the pixel data of said complementary-type partial images among said GPPLs, and a depthless image merging process to generate said complete color image of the 3D scene for display on said display device.

4. The computing system of claim 1, wherein each said GPPL is a GPU-based graphics processing pipeline which comprises (i) a video memory structure supporting a frame buffer (FB) including stencil, depth and color buffers, and (ii) a graphics processing unit (GPU) supporting (1) a geometry subsystem having an input assembler and a vertex shader, (2) a set up engine, and (3) a pixel subsystem including a pixel shader receiving pixel data from the frame buffer and a raster operators operating on pixel data in the frame buffers.

5. The computing system of claim 1, wherein each said GPPL is a GPU-based graphics processing pipeline which comprises (i) a video memory structure supporting a frame buffer (FB) including stencil, depth and color buffers, and (ii) a graphics processing unit (GPU) supporting (1) a geometry subsystem having an input assembler, a vertex shader and a geometry shader, (2) a rasterizer, and (3) a pixel subsystem including a pixel shader receiving pixel data from the frame buffer and a raster operators operating on pixel data in the frame buffers.

6. The computing system of claim 1, wherein each said GPPL is a CPU-based graphics processing pipeline which comprises (i) a video memory structure supporting a frame buffer including stencil, depth and color buffers, and (ii) a graphics processing pipeline realized by a cell of a multi-core CPU chip, including a plurality of in-order SIMD processors, and optionally, a GPPL-specific extension, namely, a texture sampler that loads texture maps from memory, filters them for level-of-detail, and feeds to pixel processing portion of the pipeline.

7. The computing system of claim 2, wherein the decomposition module supports the scanning of commands, the control of commands, the tracking of objects, the balancing of loads, and the assignment of objects to said GPPLs,

8. The computing system of claim 2, wherein said distribution module supports transmission of graphics data in various modes including CPU-to/from-GPPL, inter-GPPL, broadcast, hub-to/from-CPU, and hub-to/from-CPU and hub-to/from-GPPL.

9. The computing system of claim 1 wherein said graphics data includes data selected from the group consisting of FB data, commands, textures, geometric data and other data.

10. The computing system of claim 2, wherein said recomposition module supports a variety of modes the merging of partial complementary-type images in the color frame buffers of said GPPLs.

11. The computing system of claim 2, wherein said variety of modes of merging said partial complementary-type images includes:

merging color frame buffers without z buffers, and merging color buffers using stencil-assisted processing.

12. The computing system of claim 1, which further comprises a display device for displaying images containing graphics during the execution of said graphics-based applications.