Microprocessor locking circuit and locking method therefor with locking function

• US 20090129598A1
• Filed: 02/26/2008
• Published: 05/21/2009
• Est. Priority Date: 11/21/2007
• Status: Abandoned Application

• Current Assignee: Holtek Semiconductor Incorporated
• Original Assignee: Holtek Semiconductor Incorporated
• Inventors: Chen, David, Lin, Chun-Ku
• Application Number:
  US12/072,556
• Publication Number:
  US 20090129598A1
• Time in Patent Office: Days
• US Class Current: 380/277
• CPC Class Codes: G06F 21/71 to assure secure computing or processing of information

Abstract

A microprocessor locking circuit for use in a microprocessor comprising at least one program code is provided. The microprocessor locking circuit includes a predetermined key, wherein the microprocessor locking circuit receives an input key and compares the input key with the predetermined key after a reset period starts, wherein the program code is unlocked if the input key is identical to the predetermined key, and the program code is locked if the input key is different from the predetermined key.

Claims

1. A microprocessor locking circuit for use in a microprocessor comprising at least one program code, comprising:

a predetermined key, wherein the microprocessor locking circuit receives an input key and compares the input key with the predetermined key after a reset period starts, wherein the program code is unlocked if the input key is identical to the predetermined key, and the program code is locked if the input key is different from the predetermined key.

2. A microprocessor locking circuit as claimed in claim 1, further comprising:

an encoder encoding the predetermined key.

3. A microprocessor locking circuit as claimed in claim 1, further comprising:

a decoder decoding the predetermined key and the input key.

4. A microprocessor locking circuit as claimed in claim 1, further comprising:

a locker locking the program code.

5. A microprocessor locking circuit as claimed in claim 1, further comprising:

a burning pin receiving a burning pin voltage when burned, wherein the burning pin voltage is raised to a blank check voltage for performing a blank check by a burner before burned, and then the burning pin voltage is decreased from the blank check voltage to a zero volt, and then the burning voltage is raised from the zero volt to a burning voltage, wherein the period, when the burning pin voltage starts to decrease from the blank check voltage until the burning pin voltage reaches the burning voltage, is the reset period.

6. A microprocessor locking circuit as claimed in claim 1, wherein the microprocessor further comprises:

a program logic circuit performing data exchange with the microprocessor locking circuit;

a program memory performing data exchange with the program logic circuit and storing the program code;

a data memory performing data exchange with the program logic circuit; and

a processor performing data exchange with the program memory and the data memory, respectively.

7. A microprocessor locking circuit as claimed in claim 1, wherein the microprocessor is a one-time programming microprocessor, and a burner sends at least one program counter when the predetermined key is identical to the input key, and then the program code is read/edited.

8. A microprocessor locking circuit as claimed in claim 7, wherein when the predetermined key is identical to the input key, the burner sends the at least one program counter after a stable period, and then the program code is read/edited.

9. A microprocessor locking circuit as claimed in claim 1, wherein the microprocessor is a multi-times programming microprocessor, a burner sends at least one match pattern when the predetermined key is identical to the input key, and then the program code is read/edited after the burner sends at least one program counter.

10. A microprocessor locking circuit as claimed in claim 9, wherein when the predetermined key is identical to the input key, the burner sends the at least one match pattern after a stable period, and then the program code is read/edited after the burner sends the at least one program counter.

11. A microprocessor locking circuit as claimed in claim 1, wherein the predetermined key is input by a user.

12. A microprocessor locking circuit as claimed in claim 1, wherein the predetermined key is randomly generated.

13. A microprocessor locking circuit as claimed in claim 1, wherein the predetermined key is a constant value plus a randomly generated value.

14. A microprocessor locking circuit as claimed in claim 1, wherein the predetermined key is a variable value plus a randomly generated value.

15. A microprocessor locking circuit as claimed in claim 1, wherein the microprocessor locking circuit receives the input key and compares the predetermined key with the input key after the reset period and a stable period.

16. A locking method for a microprocessor locking circuit for use in a microprocessor, the microprocessor comprising at least one program code and the microprocessor locking circuit comprising a predetermined key, comprising steps of:

receiving an input key after a reset period starts;

comparing the predetermined key with the input key;

unlocking the program code if the input key is identical to the predetermined key; and

locking the program code if the input key is different from the predetermined key.

17. A method as claimed in claim 16, further comprising a step of:

using an encoder to encode the predetermined key.

18. A method as claimed in claim 16, further comprising a step of:

using a decoder to decode the predetermined key and the input key.

19. A method as claimed in claim 16, further comprising a step of:

using a locker to lock the program code.

20. A method as claimed in claim 16, wherein the microprocessor locking circuit further comprises a burning pin receiving a burning pin voltage when burned, wherein the burning pin voltage is raised to a blank check voltage for performing a blank check by a burner before burned, and then the burning pin voltage is decreased from the blank check voltage to a zero volt, and then the burning voltage is raised from the zero volt to a burning voltage, wherein the period, when the burning pin voltage starts to decrease from the blank check voltage until the burning pin voltage reaches the burning voltage, is the reset period.

21. A method as claimed in claim 16, further comprising steps of:

using a program logic circuit to perform data exchange with the microprocessor locking circuit;

using a program memory to perform data exchange with the program logic circuit and to store the program code;

using a data memory to perform data exchange with the program logic circuit; and

using a processor to perform data exchange with the program memory and the data memory, respectively.

22. A method as claimed in claim 16, wherein when the predetermined key is identical to the input key, the following steps are performed:

using a burner to send at least one program counter; and

reading/editing the program code.

23. A method as claimed in claim 22, wherein when the predetermined key is identical to the input key, the burner sends the at least one program counter after a stable period.

24. A method as claimed in claim 16, wherein when the predetermined key is identical to the input key, the following steps are performed:

using a burner to send at least one match pattern;

using the burner to send at least one program counter; and

reading/editing the program code.

25. A method as claimed in claim 24, wherein when the predetermined key is identical to the input key, the burner sends the at least one match pattern after a stable period.

26. A method as claimed in claim 16, wherein the predetermined key is input by a user.

27. A method as claimed in claim 16, wherein the predetermined key is randomly generated.

28. A method as claimed in claim 16, wherein the predetermined key is a constant value plus a randomly generated value.

29. A method as claimed in claim 16, wherein the predetermined key is a variable value plus a randomly generated value.

30. A method as claimed in claim 16, wherein the step of receiving the input key after the reset period starts includes receiving the input key after the reset period and a stable period.