INTRINSIC AMORPHOUS SILICON LAYER

• US 20090130827A1
• Filed: 10/31/2008
• Published: 05/21/2009
• Est. Priority Date: 11/02/2007
• Status: Abandoned Application

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Li, Liwei, Choi, Soo Young, Sheng, Shuran, Chae, Yong-Kee
• Application Number:
  US12/263,032
• Publication Number:
  US 20090130827A1
• Time in Patent Office: Days
• US Class Current: 438/486
• CPC Class Codes: C23C 16/24 Deposition of silicon only
• CPC Class Codes: C23C 16/4405 Cleaning of reactor or parts inside the reactor by using reactive gases
• CPC Class Codes: C23C 16/5096 Flat-bed apparatus
• CPC Class Codes: H01J 2237/3321 CVD [Chemical Vapor Deposition]
• CPC Class Codes: H01J 37/32091 the radio frequency energy being capacitively coupled to the plasma
• CPC Class Codes: H01J 37/32357 Generation remote from the workpiece, e.g. down-stream
• CPC Class Codes: H01L 31/075 the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
• CPC Class Codes: H01L 31/076 Multiple junction or tandem solar cells
• CPC Class Codes: H01L 31/1824 Special manufacturing methods for microcrystalline Si, uc-Si
• CPC Class Codes: H01L 31/202 including only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/206 Particular processes or apparatus for continuous treatment of the devices, e.g. roll-to roll processes, multi-chamber deposition
• CPC Class Codes: Y02E 10/545 Microcrystalline silicon PV cells
• CPC Class Codes: Y02E 10/548 Amorphous silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

Embodiments of the present invention may include an improved thin film solar cell device that is formed by sequentially depositing an intrinsic amorphous silicon layer and an intrinsic microcrystalline silicon layer during the p-i-n or n-i-p junction formation process. Embodiments of the invention also generally provide a method and apparatus for forming the same. The present invention may be used to advantage to form other single junction, tandem junction, or multi-junction thin film solar cell devices.

Claims

1. A method of forming a p-i-n junction over a substrate, comprising:

depositing a p-doped silicon layer over a surface of a substrate;

depositing an n-doped silicon layer over the surface of the substrate;

depositing an intrinsic amorphous silicon layer between the p-doped silicon layer and the n-doped silicon layer; and

depositing an intrinsic microcrystalline silicon layer on the intrinsic amorphous silicon layer.

2. The method of claim 1, wherein the intrinsic amorphous silicon layer is deposited to a thickness of 100 Å

or less.

3. The method of claim 1, wherein the intrinsic amorphous silicon layer is deposited to a thickness of 50 Å

or less.

4. The method of claim 1, wherein the p-i-n junction is formed over a first p-i-n junction, wherein the first p-i-n junction comprises an intrinsic amorphous silicon layer having a thickness of greater than about 1,000 Å

.

5. The method of claim 1, wherein the p-doped layer is deposited on the surface of the substrate and the n-doped layer is deposited over the p-doped layer, wherein the substrate comprises a transparent substrate material and a transparent conductive oxide layer.

6. The method of claim 1, wherein the p-doped silicon layer comprises a p-doped microcrystalline silicon layer, and the n-doped silicon layer comprises an n-doped amorphous silicon layer.

7. The method of claim 1, further comprising exposing the intrinsic amorphous silicon layer to a plasma treatment process before depositing the intrinsic microcrystalline silicon layer, wherein the plasma treatment process comprises exposing the intrinsic amorphous silicon layer to a plasma comprising a gas selected from the group consisting of hydrogen, helium, argon and carbon dioxide.

8. A method of forming a p-i-n junction over a substrate, comprising:

depositing a p-doped silicon layer over a surface of a substrate;

depositing an n-doped silicon layer over the surface of the substrate;

depositing an intrinsic amorphous silicon layer between the p-doped silicon layer and the n-doped silicon layer;

depositing a first intrinsic microcrystalline silicon layer on the intrinsic amorphous silicon layer by providing hydrogen gas and silane gas at a ratio of greater than about 200;

1; and

depositing a second intrinsic microcrystalline silicon layer on the first intrinsic microcrystalline silicon layer by providing hydrogen gas and silane gas at a ratio of less than about 200;

1.

9. The method of claim 8, wherein depositing the first intrinsic microcrystalline silicon layer causes at least a portion of the intrinsic amorphous silicon layer to be converted to a layer comprising microcrystalline silicon.

10. The method of claim 9, wherein substantially all of the intrinsic silicon layer is converted to microcrystalline silicon.

11. The method of claim 8, wherein the p-doped layer is deposited on the surface of the substrate and the n-doped layer is deposited over the p-doped layer, wherein the substrate comprises a transparent substrate material and a transparent conductive oxide layer.

12. The method of claim 8, wherein the p-doped silicon layer comprises a p-doped microcrystalline silicon layer, and the n-doped silicon layer comprises an n-doped amorphous silicon layer.

13. The method of claim 8, further comprising exposing the intrinsic amorphous silicon layer to a plasma treatment process before depositing the first intrinsic microcrystalline silicon layer, wherein the plasma treatment process comprises exposing the intrinsic amorphous silicon layer to a plasma comprising a gas selected from the group consisting of hydrogen, helium, argon and carbon dioxide.

14. A method of forming a p-i-n junction over a substrate, comprising:

depositing a p-doped silicon layer over a surface of the substrate in a first process chamber disposed within a first processing system;

transferring the substrate from the first process chamber to a second process chamber which is disposed within the first processing system, wherein transferring the substrate is performed in a vacuum environment; and

depositing two or more layers over the surface of the p-doped silicon layer while the substrate is positioned in the second process chamber, comprising;

depositing an intrinsic amorphous silicon layer on the p-doped silicon layer;

depositing an intrinsic microcrystalline silicon layer on the intrinsic amorphous silicon layer; and

depositing an n-doped silicon layer on the intrinsic microcrystalline silicon layer.

15. The method of claim 14, wherein a first p-i-n junction is formed over a substrate that comprises a transparent substrate material and a transparent conductive oxide layer before depositing the p-doped silicon layer.

16. The method of claim 15, wherein the first p-i-n junction comprises an intrinsic amorphous silicon layer having a thickness of greater than about 1,000 Å

.

17. The method of claim 14, wherein depositing an intrinsic microcrystalline silicon layer comprises:

depositing a first intrinsic microcrystalline silicon layer on the intrinsic amorphous silicon layer by providing hydrogen gas and silane gas at a ratio of greater than about 200;

1; and

depositing a second intrinsic microcrystalline silicon layer on the first intrinsic microcrystalline silicon layer by providing hydrogen gas and silane gas at a ratio of less than about 200;

1.

18. The method of claim 14, wherein the intrinsic amorphous silicon layer is deposited to a thickness of 100 Å

or less.

19. The method of claim 14, wherein the intrinsic amorphous silicon layer is deposited to a thickness of 50 Å

or less.

20. The method of claim 14, further comprising:

depositing a p-doped silicon layer on a surface of the substrate in a first process chamber disposed within a second processing system;

transferring the substrate from the first process chamber to a second process chamber disposed within the second processing system, wherein transferring the substrate is performed in a vacuum environment; and

depositing two or more layers over the surface of the p-doped silicon layer while the substrate is positioned in the second process chamber, comprising;

depositing an intrinsic amorphous silicon layer on the p-doped silicon layer; and

depositing an n-doped amorphous silicon layer on the intrinsic amorphous silicon layer before depositing the p-doped silicon layer over the surface of the substrate in the first process chamber disposed within the first processing system.

21. The method of claim 20, further comprising transferring the substrate from the second process chamber disposed within the second processing system to the first process chamber disposed within the first processing system after depositing an n-doped amorphous silicon layer on the intrinsic amorphous silicon layer, wherein transferring the substrate from the second process chamber to the first process chamber includes exposing the substrate to air.

22. The method of claim 14, wherein the p-doped silicon layer comprises a p-doped microcrystalline silicon layer, and the n-doped silicon layer comprises an n-doped amorphous silicon layer.