FAULT-TOLERANT NON-VOLATILE INTEGRATED CIRCUIT MEMORY

• US 20090132755A1
• Filed: 11/21/2007
• Published: 05/21/2009
• Est. Priority Date: 11/21/2007
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Radke, William H.
• Granted Patent: US 8,046,542 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 12/0223 User address space allocation, e.g. contiguous or non contiguous base addressing
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G11C 29/765 in solid state disks

Abstract

Apparatus and methods are disclosed, such as those that store data in a plurality of non-volatile integrated circuit memory devices, such as NAND flash, with convolutional encoding. A relatively high code rate for the convolutional code consumes relatively little extra memory space. In one embodiment, the convolutional code is spread over portions of a plurality of memory devices, rather than being concentrated within a page of a particular memory device. In one embodiment, a code rate of m/n is used, and the convolutional code is stored across n memory devices.

Claims

1. A method of storing data in a plurality of non-volatile integrated circuit memory devices, the method comprising:

convolutionally encoding data; and

storing the convolutionally encoded data such that the convolutionally encoded data is interleavingly spread over at least two non-volatile integrated circuit memory devices.

2. The method of claim 1, wherein:

convolutionally encoding comprises convolutionally encoding data corresponding to at least m sectors of block-encoded data, wherein m/n corresponds to a code rate of the convolutional code; and

storing comprises storing the convolutionally encoded data in n non-volatile integrated circuit memory devices.

3. The method of claim 2, further comprising:

receiving unencoded data corresponding to m sectors from a host; and

block encoding the m sectors of unencoded data to generate the m sectors of block-encoded data.

4. The method of claim 2, wherein m sectors corresponds to a number of sectors in a cluster according to a file system.

5. The method of claim 2, further comprising convolutional encoding with a code rate of m/n, wherein n is equal to m+1.

6. The method of claim 2, further comprising:

determining whether data in any of the m sectors of block-encoded data corresponds to blank data; and

bypassing convolutional encoding of the block-encoded data if that data was determined to correspond to blank data.

7. The method of claim 6, determining that a sector is blank at least partially based on examination of formatting for the sector.

8. The method of claim 2, further comprising selecting a code rate m/n for the convolutional encoding at least partially based on a number of non-volatile integrated circuit memory devices over which data is spread.

9. The method of claim 2, further comprising selecting a puncturing pattern at least partially based on a number of non-volatile integrated circuit memory devices over which data is spread.

10. A method of reading data from a plurality of non-volatile integrated circuit memory devices, the method comprising:

retrieving convolutionally encoded data from at least two non-volatile integrated circuit memory devices, wherein the convolutionally encoded data is spread over the at least two non-volatile integrated circuit memory devices; and

deconvolving the convolutionally encoded data retrieved from the memory devices, wherein deconvolving comprises rearranging the convolutional encoded data to restore an original order of the convolutional encoded data.

11. The method of claim 10, wherein deconvolving comprises inserting data and decoding via a Viterbi algorithm.

12. The method of claim 10, further comprising receiving a request from a host for a cluster of data corresponding to the retrieved convolutional encoded data prior to retrieving.

13. The method of claim 10, further comprising block decoding the deconvolved data.

14. The method of claim 10, further comprising:

determining that portions of the retrieved data correspond to blank data; and

bypassing deconvolving for those portions.

15. A method of storing data in a plurality non-volatile integrated circuit memory devices, the method comprising:

convolutional encoding m first-size portions of data into m second-size portions of convolutional code using a code rate of m/n, wherein the second-size portions are n/m times larger than the first-size sectors, wherein at least one of the m first-size portions contains actual data as opposed to blank data; and

storing the m second-size portions of convolutional code in n non-volatile integrated circuit memory devices, wherein the m non-volatile integrated circuit memory devices are configured to store m first-size portions, wherein n is at least two.

16. The method of claim 15, further comprising wherein convolutional encoding further comprises puncturing the convolutional code.

17. The method of claim 15, further comprising:

determining that at least one of the m first-size portions of data corresponds to blank data; and

bypassing a convolutional coding of a corresponding portion of the m second-size sectors of convolutional code for the m non-volatile integrated circuit memory devices.

18. The method of claim 15, further comprising block encoding the data prior to convolutional encoding.

19. A method of accessing data from a plurality of non-volatile integrated circuit memory devices, the method comprising:

receiving a request from a host for data;

retrieving one or more associated sectors of data from at least one of two or more of the non-volatile integrated circuit memory devices, wherein the one or more associated sectors are of a first sector size; and

deconvolving at least a portion of the one or more associated sectors to generate one or more sectors of information related to at least portion of the requested page, wherein the one or more sectors of the generated information are of a second sector size smaller than the first sector size by a code rate of a convolutional code that is deconvolved, wherein the sectors of generated information are read for deconvolving one page after another from the non-volatile integrated circuit memory devices.

20. The method of claim 19, wherein deconvolving comprises:

compensating for punctured data; and

decoding via a Viterbi algorithm.

21. The method of claim 19, wherein receiving the request from the host comprises receiving a request from the host for a cluster of data.

22. The method of claim 19, further comprising decoding block codes from the generated information to generate the requested data.

23. The method of claim 19, further comprising:

determining that one of more of the retrieved sectors are blank; and

bypassing deconvolving for the blank sectors such that the generated information corresponds to blank data.

24. An apparatus comprising:

a first buffer;

a second buffer;

control logic configured to interface between a host and a plurality of non-volatile integrated circuit memory devices and to control the storage of data from the second buffer to the non-volatile integrated circuit memory devices such that data is interleavingly spread over the non-volatile integrated circuit memory devices;

a convolutional code encoder configured to encode data stored in the first buffer and to store the encoded data in the second buffer for transfer to the non-volatile integrated circuit memory devices; and

a convolutional code decoder configured to decode data stored in the second buffer retrieved from the non-volatile integrated circuit memory devices and to store the decoded data in the first buffer.

25. The apparatus of claim 24, wherein the control logic is further configured to control data transfer to and/or from the first buffer to the second buffer,

26. The apparatus of claim 24, further comprising an error correction code (ECC) module configured to block encode data transferred from the host and to decode block-encoded data to be transferred to the host.

27. The apparatus of claim 24, further comprising a blank sector bypass module configured to bypass the convolutional code encoder and/or convolutional code decoder in response to detecting blank data.

28. The apparatus of claim 27, wherein the blank sector bypass module is further configured to determine that a sector is blank at least partially based on examination of formatting for the sector.

29. The apparatus of claim 24, wherein the apparatus is embodied in a NAND flash memory controller.

30. The apparatus of claim 24, wherein the control logic is further configured to select a code rate m/n for the convolutional code encoder at least partially based on a number of non-volatile integrated circuit memory devices over which data is spread.

31. The apparatus of claim 24, wherein the control logic is further configured to select a puncturing pattern for the convolutional code encoder at least partially based on a number of non-volatile integrated circuit memory devices over which data is spread.