SEMICONDUCTOR PACKAGE, ELECTRONIC DEVICE INCLUDING THE SEMICONDUCTOR PACKAGE, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
First Claim
1. A semiconductor package, comprising:
- a plurality of semiconductor chips mounted on a carrier;
a first insulating layer disposed on the semiconductor chips;
a plurality of first via-holes disposed in the first insulating layer and exposing a portion of each of the semiconductor chips;
a first conductive pattern disposed in the first via-holes and electrically connected to the semiconductor chips; and
an external terminal electrically connected to the first conductive pattern.
1 Assignment
0 Petitions
Accused Products
Abstract
Provided are a semiconductor package, an electronic device including the semiconductor package and a method of manufacturing the semiconductor package. The semiconductor package includes semiconductor chips mounted on a carrier, a first insulating layer sealing the semiconductor chips, first via-holes which are formed in the first insulating layer and expose a portion of each of the semiconductor chips, a first conductive pattern which is filled in the first via-holes and electrically connected to each of the semiconductor chips, and an external terminal which is electrically connected to the first conductive pattern. The semiconductor package is manufactured by performing an encapsulating process and a via-hole process.
60 Citations
20 Claims
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1. A semiconductor package, comprising:
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a plurality of semiconductor chips mounted on a carrier; a first insulating layer disposed on the semiconductor chips; a plurality of first via-holes disposed in the first insulating layer and exposing a portion of each of the semiconductor chips; a first conductive pattern disposed in the first via-holes and electrically connected to the semiconductor chips; and an external terminal electrically connected to the first conductive pattern. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A semiconductor package, comprising:
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an insulating layer disposed on a carrier; a plurality of semiconductor chips stacked on the carrier such that the semiconductor chips are covered by the insulating layer and edges of lower semiconductor chips are exposed by higher semiconductor chips; a conductive pattern including sub patterns electrically connected to exposed edges of the semiconductor chips and a main pattern electrically connected to the sub patterns; and an external terminal electrically connected to the semiconductor chips by the conductive pattern. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A semiconductor package, comprising:
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a first semiconductor chip disposed on a carrier, the first semiconductor chip including first pads disposed on the first semiconductor chip; a second semiconductor chip disposed on the first semiconductor chip, the second semiconductor chip including second pads disposed on the second semiconductor chip, wherein the first pads are exposed by the second semiconductor chip; a first insulating layer disposed on the carrier and the first and second semiconductor chips; a plurality of first via-holes disposed in the first insulating layer, the first via-holes exposing the first and second pads; a first conductive pattern disposed in the via-holes and on the first insulating layer, wherein at least a portion of the first conductive pattern extends across a surface of the first insulating layer; and a plurality of external terminals electrically connected to the first and second pads through the first conductive pattern. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification