Liquid crystal display element and pixel structure

• US 20090135321A1
• Filed: 06/17/2008
• Published: 05/28/2009
• Est. Priority Date: 11/28/2007
• Status: Active Grant

• Current Assignee: AU Optronics Corporation
• Original Assignee: AU Optronics Corporation
• Inventors: Hou, Hung-Lung, Su, Ting-Wei, Liao, Pei-Chun
• Granted Patent: US 8,305,539 B2
• Time in Patent Office: Days
• US Class Current: 349/37
• CPC Class Codes: G02F 1/133707 Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
• CPC Class Codes: G02F 1/134336 Matrix
• CPC Class Codes: G02F 1/134345 Subdivided pixels, e.g. for grey scale or redundancy
• CPC Class Codes: G02F 1/13624 having more than one switching element per pixel
• CPC Class Codes: G09G 2300/0443 with several sub-pixels for the same colour in a pixel, not specifically used to display gradations G09G3/364 takes precedence
• CPC Class Codes: G09G 2320/0209 Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

A pixel structure of liquid crystal display including a first and a second sub-pixel electrodes, a first and a second data lines, a gate line, and a first and a second transistors is provided. The first and the second sub-pixel electrodes disposed in the first and second sub-pixel areas respectively include at least two display domains at left and right. The first data line is disposed under the interface between two domains of each of the first and second sub-pixel electrodes, and the second data line is disposed under the edges of the first and second sub-pixel electrodes. The gate line is disposed between the first and second sub-pixel areas. The first sub-pixel electrode is controlled by the gate line and the first data line through the first transistor. The second sub-pixel electrode is controlled by the gate line and the second data line through the second transistor.

Claims

1. A liquid crystal display element disposed in a pixel area including a first sub-pixel area and a second sub-pixel area, comprising:

a first sub-pixel electrode and a second sub-pixel electrode disposed in the first sub-pixel area and the second sub-pixel area respectively, wherein each of the first sub-pixel electrode and the second sub-pixel electrode at least comprise at least two display domains at the left and the right;

a first data line and a second data line, wherein the first data line is disposed at the interface between the two display domains of the first sub-pixel electrode and the second sub-pixel electrode, and the second data line is disposed at the edges of the pixel area;

a gate line disposed between the second sub-pixel area and the first sub-pixel area; and

a first transistor and a second transistor, wherein the first sub-pixel electrode and the second sub-pixel electrode are respectively controlled by the first data line and the second data line through the first transistor and the second transistor.

2. The display element according to claim 1, wherein each two display domains of the first sub-pixel electrode and the second sub-pixel electrode correspondingly control tilting directions of liquid crystal molecules which form a contained angle of about 45 degrees with the first data line.

3. The display element according to claim 1, wherein the first sub-pixel electrode and the second sub-pixel electrode are inputted voltages of opposite polarities.

4. The display element according to claim 1, wherein the first sub-pixel electrode and the second sub-pixel electrode are respectively driven by a first voltage and a second voltage, and the second voltage is larger than the first voltage.

5. The display element according to claim 1, wherein each of the first sub-pixel electrode and the second sub-pixel electrode comprises four display domains including a first display domain, a second display domain, a third display domain, and a fourth display domain.

6. The display element according to claim 5, wherein the first display domain and the third display domain of the first sub-pixel electrode are disposed at the left of the first data line, the second display domain and the fourth display domain of the first sub-pixel electrode are disposed at the right of the first data line, and the first data line is disposed at the interface between the first display domain and the second display domain and also disposed at the interface between the third display domain and the fourth display domain.

7. The display element according to claim 5, wherein the first display domain and the third display domain of the second sub-pixel electrode are disposed at the left of the first data line, the second display domain and the fourth display domain of the second sub-pixel electrode are disposed at the right of the first data line, and the first data line is disposed at the interface between the first display domain and the second display domain and also disposed at the interface between the third display domain and the fourth display domain.

8. The display element according to claim 5, wherein four display domains of the first sub-pixel electrode and the four display domains of the second sub-pixel electrode are respectively inputted voltages of opposite polarities.

9. The display element according to claim 5, wherein the total area of the four display domains of the first sub-pixel electrode is larger than that of the four display domains of the second sub-pixel electrode.

10. The display element according to claim 5, wherein the four display domains of the first sub-pixel electrode and that of the second sub-pixel electrode are respectively driven by a first voltage and a second voltage, and second voltage is larger than the first voltage.

11. A liquid crystal display element disposed in a pixel area including a first sub-pixel area, a second sub-pixel area, a third sub-pixel area and a fourth sub-pixel area, comprising:

a first pixel element, comprising;

a first sub-pixel electrode and a second sub-pixel electrode disposed in the first sub-pixel area and the second sub-pixel area respectively, wherein each of the first sub-pixel electrode and the second sub-pixel electrode comprises at least two display domains at the left and the right; and

a first transistor and a second transistor, wherein the first sub-pixel electrode and the second sub-pixel electrode are respectively connected to the first transistor and the second transistor;

a second pixel element, comprising;

a third sub-pixel electrode and a fourth sub-pixel electrode disposed in the third sub-pixel area and the fourth sub-pixel area respectively, wherein the third sub-pixel electrode and the fourth sub-pixel electrode respectively at least comprises two display domains at the left and the right; and

a third transistor and a fourth transistor, wherein the fourth sub-pixel electrode and the third sub-pixel electrode are respectively connected to the third transistor and the fourth transistor;

a first data line and a second data line, wherein the first data line is disposed at the interface between the two display domains of the first sub-pixel electrode and the second sub-pixel electrode, and the second data line is disposed at the edges of the first pixel area;

a third data line and a fourth data line, wherein the third data line is disposed at the interface between the two display domains the third sub-pixel electrode and the fourth sub-pixel electrode, and the fourth data line is disposed at the edges of the second pixel area; and

a gate line disposed between the first sub-pixel electrode and the second sub-pixel electrode, and disposed between the third sub-pixel electrode and the fourth sub-pixel electrode, wherein the first sub-pixel electrode, the second sub-pixel electrode, the third sub-pixel electrode and the fourth sub-pixel electrode are respectively controlled by the first data line, the second data line, the third data line and the fourth data line through the first transistor, the second transistor, the third transistor and the fourth transistor.

12. The display element according to claim 11, wherein each two display domains of the first, the second, the third and the fourth sub-pixel electrodes correspondingly control tilting directions of liquid crystal molecules which form a contained angle of about 45 degrees with the first data line.

13. The display element according to claim 11, wherein the first sub-pixel electrode and the second sub-pixel electrode are inputted voltages of opposite polarities.

14. The display element according to claim 11, wherein third sub-pixel electrode and the fourth sub-pixel electrode are inputted voltages of opposite polarities.

15. The display element according to claim 11, wherein the first sub-pixel electrode and the second sub-pixel electrode in the first pixel element are respectively driven by a first voltage and a second voltage, and the second voltage is larger than the first voltage.

16. The display element according to claim 11, wherein the third sub-pixel electrode and the fourth sub-pixel electrode in the second pixel element are respectively driven by a fourth voltage provided by the fourth data line and a third voltage provided by the third data line, and the third voltage is larger than the fourth voltage.

17. The display element according to claim 11, wherein the first and the second sub-pixel electrodes both in the first pixel area and the third and the fourth sub-pixel electrodes both in the second pixel area respectively comprise four display domains.

18. The display element according to claim 17, wherein the first sub-pixel electrode in the first pixel element comprises:

a first display domain and a third display domain both disposed at the left of the first data line; and

a second display domain and a fourth display domain both disposed at the right of the first data line, wherein the first data line is disposed at the interface between the first display domain and the second display domain and also disposed at the interface between the third display domain and the fourth display domain, and the first, the second, the third and the fourth display domains of the first sub-pixel electrode are controlled by the first data line through the first transistor.

19. The display element according to claim 17, wherein the second sub-pixel electrode in the first pixel element comprises:

a first display domain and a third display domain both disposed at the left of the first data line, and a second display domain and a fourth display domain both disposed at the right of the first data line, wherein the first data line is disposed at the interface between the first display domain and the second display domain and also disposed at the interface between the third display domain and the fourth display domain.

20. The display element according to claim 17, wherein the third sub-pixel electrode in the second pixel element comprises:

a first display domain and a third display domain both disposed at the left of the third data line, and a second display domain and a fourth display domain both disposed at the right of the third data line, wherein the third data line is disposed at the interface between the first display domain and the second display domain and also disposed at the interface between the third display domain and the fourth display domain, and the first, the second, the third and the fourth display domains of the third sub-pixel electrode are controlled by the fourth data line through the fourth transistor.

21. The display element according to claim 17, wherein the fourth sub-pixel electrode in the second pixel element comprises:

a first display domain and a third display domain both disposed at the left of the third data line, and a second display domain and a fourth display domain both disposed at the right of the third data line, wherein the third data line is disposed at the interface between the first display domain and the second display domain and also disposed at the interface between the third display domain and the fourth display domain, and the first, the second, the third and the fourth display domains of the fourth sub-pixel electrode are controlled by the third data line through the third transistor.

22. The display element according to claim 17, wherein the display domains of the first sub-pixel electrode and the second sub-pixel electrode correspondingly control tilting directions of liquid crystal molecules which all form a contained angle of 45 degrees with the first data line, and the display domains of the third sub-pixel electrode and the fourth sub-pixel electrode correspondingly control the tilting directions of the liquid crystal molecules which all form a contained angle of 45 degrees with the third data line.

23. The display element according to claim 17, wherein the four display domains of the first sub-pixel electrode and the second sub-pixel electrode are inputted voltages of opposite polarities as well as the four domains of the third sub-pixel electrode and the fourth sub-pixel electrode are inputted voltages of opposite polarities, and the four display domains of the first sub-pixel electrode and the fourth sub-pixel electrode are inputted voltages of the same polarity.

24. The display element according to claim 17, wherein the four display domains of the first sub-pixel electrode and the second sub-pixel electrode in the first pixel area are respectively driven by a first voltage and a second voltage larger than the first voltage, and the four display domains of the third sub-pixel electrode and the fourth sub-pixel electrode in the second pixel area are respectively driven by a fourth voltage provided by the fourth data line and a third voltage provided by the third data line, and the third voltage is larger than the fourth voltage.