SYSTEM AND METHOD FOR APPLICATION LAYER TIME SYNCHRONIZATION WITHOUT CREATING A TIME DISCREPANCY OR GAP IN TIME

• US 20090135677A1
• Filed: 11/21/2008
• Published: 05/28/2009
• Est. Priority Date: 11/25/2007
• Status: Abandoned Application

• Current Assignee: Trilliant Networks Incorporated
• Original Assignee: Trilliant Networks Incorporated
• Inventors: VEILLETTE, Michel
• Application Number:
  US12/275,237
• Publication Number:
  US 20090135677A1
• Time in Patent Office: Days
• US Class Current: 368/47
• CPC Class Codes: G04R 40/06 by computing the time value implied by the radio signal
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

In correcting a time discrepancy, a clock may be speeded up or slowed down using an adjustment ratio. The ratio may be used to slow down or speed up the clock for an amount of time, after which the clock speed will be correct.

Claims

1. A system comprising:

a first device including a radio transmitting a reference time, the first device is coupled to a time source having a reference time;

a second device including a second clock and a second radio, the second radio adapted to receive a message including an instruction to synchronize the second clock either by speeding up or by slowing down the second clock to re-synchronize the clock in accordance with the reference time by the use of a correction parameter.

2. The system in claim 1, wherein the correction parameter comprises a correction ratio that specifies a percentage of time to speed up or slow down a clock.

3. The system in claim 1, wherein the slowing down or speeding up of the second clock to re-synchronize is performed by delaying a shorter amount of time between counts of time and without skipping any clock state or count.

4. The system of claim 1, wherein a clock has been speeded up or slowed down, and records an energy using event in accordance with the time of the clock.

5. The system of claim 1, wherein the clock is adjusted in speed in accordance to the ratio until a time discrepancy is corrected.

6. The system of claim 1, wherein the correction ratio is a percentage of 1% of the speed of the clock to speed up.

7. The system of claim 1, wherein the correction ratio is a percentage of 1% of the speed of the clock to slow down.

8. The system of claim 1, wherein the memory stores data in a format according to an ANSI C12.19 format table.

9. A method comprising:

transmitting a message requesting a reference time;

receiving a message including a reference time;

determining an amount of mis-synchronization; and

adjusting a clock in a device for an amount of time and at a prescribed adjustment rate.

10. The method of claim 9, wherein the determining an amount of mis-synchronization is performed by a device having a mis-synchronized clock.

11. The method of claim 9, wherein the generating a message including an amount of time to adjust a clock of a device and a rate at which to adjust the clock of the device to is performed by a device having the reference time.

12. The method of claim 9, wherein the rate is expressed in increments of 1/255 percent of speed (0.14 seconds per hour) to 1/1 percent of speed (36 seconds per hour).

13. The method of claim 9, wherein the rate increases the speed of the clock.

14. The method of claim 9, wherein the rate decreases the speed of the clock.

15. The method of claim 9 wherein the clock is a counter, and counts time as a total number of seconds.

16. The method of claim 9, wherein at least a portion of the method is performed at an application layer level.

17. The method of claim 9, wherein at least the steps of determining an amount of mis-synchronization and the adjusting a clock in a device for an amount of time and at a prescribed adjustment rate, are performed at an application layer level.

18. A method comprising:

requesting a reference time from an external source;

receiving a reference time from the external source;

determining an amount of mis-synchronization between a local clock time within a device and the reference time;

identifying a rate at which to adjust the local clock of the device to match the reference time so that the local clock and the reference times are synchronized; and

adjusting the local clock time to synchronize to the reference time after a predetermined time period without skipping any local clock time increments while performing the re-synchronization.

19. The method of claim 18, wherein at least a portion of the method is performed at an application layer level.

20. The method of claim 18, wherein at least the steps of determining, identifying, and the adjusting the local clock, are performed at an application layer level.

21. A device comprising:

a clock;

a memory coupled to the clock for storing;

a date and time;

a time adjustment ratio expressed in a faction of one percent (1/255-1/1).

22. The device of claim 21, wherein the clock is adjusted in speed in accordance to the ratio until a time discrepancy is corrected.

23. The device of claim 21, wherein the correction ratio is a percentage of 1% of the speed of the clock to speed up.

24. The device of claim 21, wherein the correction ratio is a percentage of 1% to slow down.

25. The device of claim 21, wherein the memory stores data in a format according to an ANSI C12.19 table.

26. The device of claim 21, further including the date, the time, and the time adjustment ratio stored in the memory.

27. A system comprising:

a device including a clock and a radio, the radio including a radio receiver adapted to receive a message from an external transmitter, the message including a reference time and an instruction to synchronize the clock, the synchronization being achieved either by speeding up or by slowing down the clock to re-synchronize the clock in accordance with the reference time by the use of a correction parameter.

28. The system in claim 27, further including the external transmitter, and wherein the external transmitter is at least intermittently coupled to a time source having the reference time.

29. A computer program stored in a computer readable form for execution in a processor and a processor coupled memory to implement a method comprising:

transmitting a message requesting a reference time;

receiving a message including a reference time;

determining an amount of mis-synchronization; and

adjusting a clock in a device for an amount of time and at a prescribed adjustment rate.

30. A computer program stored in a computer readable form for execution in a processor and a processor coupled memory to implement a method comprising:

requesting a reference time from an external source;

receiving a reference time from the external source;

determining an amount of mis-synchronization between a local clock time within a device and the reference time;

identifying a rate at which to adjust the local clock of the device to match the reference time so that the local clock and the reference times are synchronized; and

adjusting the local clock time to synchronize to the reference time after a predetermined time period without skipping any local clock time increments while performing the re-synchronization.