Low Power Operation of Networked Devices

• US 20090135751A1
• Filed: 11/26/2007
• Published: 05/28/2009
• Est. Priority Date: 11/26/2007
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Bahl, Paramvir, Chandra, Ranveer, Hodges, Stephen E., Scott, James W., Agarwal, Yuvraj
• Granted Patent: US 8,068,433 B2
• Time in Patent Office: Days
• US Class Current: 370/311
• CPC Class Codes: G06F 1/3209 Monitoring remote activity, e.g. over telephone lines or network connections
• CPC Class Codes: G06F 1/3293 by switching to a less power-consuming processor, e.g. sub-CPU
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Methods of reducing power consumption of networked devices are described. When a main processor and associated hardware in a computing device is powered down, a processing element, with lower power consumption than the main processor, performs networking functions on behalf of the main processor. The processing element monitors events and wakes the main processor when defined criteria are satisfied. In an embodiment, these network functions may be to maintain existing network connections and/or establish new network connections and the defined criteria may relate to messages received by the device which are analyzed by the processing element running the application layer code and these criteria may be configurable by a user of the device.

Claims

1. A computing device comprising:

a network interface device;

a processing element; and

an output to a main processor,

wherein the processing element is arranged to;

perform networking operations on behalf of the main processor when the main processor is powered down; and

send a wake up signal to the main processor via the output when defined criteria are satisfied.

2. A computing device according to claim 1, wherein the networking operations comprise at least one of:

maintaining network connectivity on behalf of the main processor;

establishing a network connection on behalf of the main processor; and

detecting a connection opportunity on behalf of the main processor.

3. A computing device according to claim 1, wherein the processing element is further arranged to:

analyze data received via the network interface when the main processor is powered down; and

wherein the wake up signal is sent when the received data satisfies defined criteria.

4. A computing device according to claim 3, wherein the processing element is arranged to maintain network connectivity by periodically sending messages to elements in a network via the network interface and responding to defined messages.

5. A computing device according to claim 1, wherein the processing element is further arranged to:

obtain state information from the main processor prior to the main processor powering down.

6. A computing device according to claim 5, further comprising a second network interface, wherein the state information comprises a MAC address and an IP address of the second network interface and wherein the processing element is further arranged to:

switch on the network interface device on detection of powering down of the main device; and

switch off the network interface device after sending the wake up signal.

7. A computing device according to claim 5, wherein the network interface device is arranged to:

operate under control of the processing element when the main processor is powered down; and

operate under the control of the main processor when the main processor is not powered down.

8. A computing device according to claim 1, wherein the processing element is further arranged to:

provide state information to the main processor on wake up.

9. A computing device according to claim 8, further comprising the main processor and wherein the main processor is arranged on wake up to initialize the device using the state information provided by the processing element.

10. A computing device according to claim 9, wherein the main processor is in a separate power domain to the processing element and wherein the main processor has a higher power consumption than the processing element.

11. A computing device according to claim 1, wherein the processing element is further arranged to:

detect when the main processor powers down.

12. A method of power control comprising:

detecting a main processor in a computing device powering down;

using a lower power processor to perform networking operations on behalf of the main processor; and

waking the main processor when defined criteria are satisfied.

13. A method according to claim 12, wherein the networking operations comprise at least one of:

maintaining network connectivity on behalf of the main processor;

establishing a network connection on behalf of the main processor; and

detecting a connection opportunity on behalf of the main processor.

14. A method according to claim 12, further comprising:

analyzing data received; and

sending a wake up signal to the main processor when the data received satisfies the defined criteria.

15. A method according to claim 12, wherein network connectivity is maintained by periodically sending messages to network elements and by responding to defined messages.

16. A method according to claim 12, further comprising:

transferring state information between the main processor and the processing element.

17. A power control system comprising a first and a second power domain, wherein the first power domain comprises a first processor and associated hardware and wherein the second power domain comprises:

a network interface device;

a second processor; and

a memory arranged to store executable instructions arranged to cause the second processor to;

detect when the first power domain enters a sleep state from an operating state;

maintain network connectivity; and

cause the first power domain to return to the operating state when defined criteria are satisfied.

18. A power control system according to claim 17, wherein the memory is further arranged to store executable instructions arranged to cause the second processor to:

analyze data received via the network interface when the first power domain is in the sleep state; and

send a signal to the first processor to cause the first power domain to return to the operating state when the received data satisfies the defined criteria.

19. A power control system according to claim 17, wherein the memory is further arranged to store executable instructions arranged to cause the second processor to:

transfer state information between the first and the second processor.

20. A power control system according to claim 17, wherein the executable instructions arranged to cause the second processor to use application layer protocols to maintain network connectivity comprise executable instructions arranged to cause the second processor to:

periodically send messages to elements in a network to maintain connectivity.