ETCH SYSTEM

• US 20090139657A1
• Filed: 09/10/2008
• Published: 06/04/2009
• Est. Priority Date: 12/04/2007
• Status: Abandoned Application

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Ma, Diana X., Eaton, Brad, LEE, CHANGHUN
• Application Number:
  US12/207,815
• Publication Number:
  US 20090139657A1
• Time in Patent Office: Days
• US Class Current: 156/345.240
• CPC Class Codes: H01J 37/32357 Generation remote from the workpiece, e.g. down-stream
• CPC Class Codes: H01J 37/32449 Gas control, e.g. control of the gas flow
• CPC Class Codes: H01J 37/32935 Monitoring and controlling tubes by information coming from the object and/or discharge
• CPC Class Codes: H01J 37/32972 Spectral analysis
• CPC Class Codes: H01L 21/67069 for drying etching
• CPC Class Codes: H01L 21/67207 comprising a chamber adapted to a particular process
• CPC Class Codes: H01L 21/67276 Production flow monitoring, e.g. for increasing throughput program-control systems per se G05B19/00, e.g. total factory control G05B19/418

Abstract

A semiconductor processing system includes a factory interface. A central transfer chamber is coupled to the factory interface. A first number of etch chambers are coupled to the central transfer chamber. The first number of etch chambers are configured to etch a substrate at about a first processing time. A second number of post-etch treatment chambers are coupled to the central transfer chamber. The second number of post-etch treatment chambers are configured to process the substrate at about a second processing time, wherein a ratio of the first number to the second number is substantially proportional to a ratio of the first processing time to the second processing time.

Claims

1. A semiconductor processing system, comprising:

a factory interface;

a central transfer chamber coupled to the factory interface;

a first number of etch chambers coupled to the central transfer chamber, the first number of etch chambers being configured to etch a substrate at about a first processing time; and

a second number of post-etch treatment chambers coupled to the central transfer chamber, the second number of post-etch treatment chambers being configured to process the substrate at about a second processing time, wherein a ratio of the first number to the second number is substantially proportional to a ratio of the first processing time to the second processing time.

2. The semiconductor processing system of claim 1 further comprising at least one robot configured to transfer the substrate between the factory interface and the transfer chamber.

3. The semiconductor processing system of claim 1, wherein a vacuum level within the central transfer chamber is substantially equal to a vacuum level within the etch chambers or the post-etch treatment chambers.

4. The semiconductor processing system of claim 1, wherein the first number is 3 and the second number is 2.

5. The semiconductor processing system of claim 1, wherein the first processing time is between about 75 seconds and about 225 seconds and the second processing time is between about 50 seconds and about 150 seconds.

6. The semiconductor processing system of claim 1, wherein the etch chamber are metal etch chambers.

7. The semiconductor processing system of claim 1, wherein the post-etch treatments chambers are configured to remove at least one of photoresist, etch residues and etch by-product.

8. The semiconductor processing system of claim 1, wherein the etch chambers are configured to clean the substrate.

9. The semiconductor processing system of claim 8, wherein a time for cleaning the substrate is between about 10 seconds and about 40 seconds.

10. A semiconductor processing system of claim 1, wherein the ratio of the first number to the second number is predetermined that the substrate is transferred among the etch chambers and the post-etch treatment chambers without substantially idling.

11. A semiconductor processing system, comprising:

a factory interface;

a central transfer chamber coupled to the factory interface;

at least one robot configured to transfer a substrate between the factory interface and the transfer chamber;

a first number of metal etch chambers coupled to the central transfer chamber, the first number of etch chambers being configured to etch the substrate at about a first processing time; and

a second number of post-etch treatment chambers coupled to the central transfer chamber, the second number of post-etch treatment chambers being configured to process the substrate at about a second processing time, wherein a ratio of the first number to the second number is substantially proportional to a ratio of the first processing time to the second processing time.

12. The semiconductor processing system of claim 11, wherein a vacuum level within the central transfer chamber is substantially equal to a vacuum level within the metal etch chambers or the post-etch treatment chambers.

13. The semiconductor processing system of claim 11, wherein the first number is 3 and the second number is 2.

14. The semiconductor processing system of claim 11, wherein the first processing time is between about 75 seconds and about 225 seconds and the second processing time is between about 50 seconds and about 150 seconds.

15. The semiconductor processing system of claim 11, wherein the post-etch treatments chambers are configured to remove at least one of photoresist, etch residues and etch by-product.

16. The semiconductor processing system of claim 11, wherein the metal etch chambers are configured to clean the substrate.

17. The semiconductor processing system of claim 16, wherein a time for cleaning the substrate is between about 30 seconds and about 150 seconds.

18. A semiconductor processing system, comprising:

a factory interface;

a central transfer chamber coupled to the factory interface;

at least one robot configured to transfer a substrate between the factory interface and the transfer chamber;

three metal etch chambers coupled to the central transfer chamber, the etch chambers being configured to etch the substrate at about a first processing time; and

two post-etch treatment chambers coupled to the central transfer chamber, the post-etch treatment chambers being configured to process the substrate at about a second processing time.

19. The semiconductor processing system of claim 18, wherein a vacuum level within the central transfer chamber is substantially equal to a vacuum level within the metal etch chambers or the post-etch treatment chambers.

20. The semiconductor processing system of claim 18, wherein the first processing time is about 120 seconds and the second processing time is about 80 seconds.

21. The semiconductor processing system of claim 18, wherein the post-etch treatments chambers are configured to remove at least one of photoresist, etch residues and etch by-product.

22. The semiconductor processing system of claim 18, wherein the etch chambers are configured to clean the substrate for about 30 seconds.