BINARY-TREE MULTIPLEXING SCHEDULING

• US 20090141698A1
• Filed: 02/09/2009
• Published: 06/04/2009
• Est. Priority Date: 06/13/2001
• Status: Abandoned Application

• Current Assignee: Rakuten, Inc. (Rakuten Group, Inc.)
• Original Assignee: Interdigital Technology Corporation (InterDigital, Inc.)
• Inventors: Chao, Yi-Ju
• Application Number:
  US12/368,004
• Publication Number:
  US 20090141698A1
• Time in Patent Office: Days
• US Class Current: 370/345
• CPC Class Codes: H04J 3/1629 Format building algorithm
• CPC Class Codes: H04W 72/1221 based on age of data to be sent
• CPC Class Codes: H04W 72/569 of the traffic information

Abstract

Multiplexed scheduling of information blocks from multiple sources on a single communication channel divided into multiple address positions is performed. The information block from each source has a repetition period and is divided into a number of segments. A bandwidth adequacy verification is performed for expected information blocks to be scheduled on the channel. Mapping positions are assigned corresponding to nodes in a binary tree, whereby each layer of the binary tree corresponds to a repetition period of the respective information block. Assignment of the information blocks to the binary tree is based on a priority order of repetition period of the respective information block.

Claims

1. A method for multiplexed scheduling of information blocks from multiple sources on a single communication channel, comprising:

defining blocks of information and associating each block of information with a source of information;

dividing the single communication channel into multiple address positions;

confirming bandwidth for the defined blocks of information;

determining a number of positions necessary to allow the information blocks to be scheduled;

sorting the information blocks in a scheduler list; and

scheduling the information blocks in accordance with the scheduling list.

2. The method as in claim 1, wherein each information block has its own repetition period.

3. The method as in claim 2, wherein the information blocks are sorted in ascending order of their repetition period.

4. The method as in claim 2, further comprising dividing information blocks into information segments.

5. The method as in claim 2, wherein the repetition period indicates how often the information accesses a single channel.

6. The method as in claim 1, wherein information segments are assigned to the multiple address positions corresponding to binary tree nodes.

7. The method as in claim 6, further comprising creating a position assignment list where each information segment for each information block is assigned to a single position.

8. The method as in claim 6 wherein a first information block is assigned to nodes of the binary tree in accordance with the following equation:

m=log₂(INFO₁(RP))≦

N

wherein m represents a binary tree layer, (INFO₁(RP)) represents a first information block repetition period, and N is the total number of binary tree layers.

9. The method as in claim 8, wherein the first information block is a management information base (MIB).

10. A microprocessor configured to define blocks of information and to associate each block of information with a source of information;

divide the single communication channel into multiple address positions;

confirm bandwidth for the defined blocks of information;

determine a number of positions necessary to allow the information blocks to be scheduled;

sort the information blocks in a scheduler list; and

schedule the information blocks in accordance with the scheduling list.

11. The microprocessor as in claim 10, configured to sort the information blocks in ascending order by repetition period, where each information block has its own repetition period according to how often the information accesses the communication channel.

12. The microprocessor as in claim 11, configured to divide each information blocks into information segments.

13. The microprocessor as in claim 12, wherein the information segments are assigned to the multiple address positions corresponding to binary tree nodes.

14. The microprocessor as in claim 13, further configured to create a position assignment list where each information segment for each information block is assigned to a single position.

15. The microprocessor as in claim 13, further configured to assign a first information block to nodes of the binary tree in accordance with the following equation:

m=log₂(INFO₁(RP))≦

N

wherein m represents a binary tree layer, (INFO₁(RP)) represents a first information block repetition period, and N is the total number of binary tree layers.

16. The microprocessor as in claim 15, wherein the first information block is a management information base (MIB).