DOWN-CONVERTER AND UP-CONVERTER FOR TIME-ENCODED SIGNALS

• US 20090141780A1
• Filed: 11/29/2007
• Published: 06/04/2009
• Est. Priority Date: 11/29/2007
• Status: Active Grant

• Current Assignee: HRL Laboratories LLC (The Boeing Co.)
• Original Assignee: HRL Laboratories LLC (The Boeing Co.)
• Inventors: Petre, Peter, Cruz-Albrecht, Jose
• Granted Patent: US 8,040,265 B2
• Time in Patent Office: Days
• US Class Current: 375/211
• CPC Class Codes: H04L 2027/0024 at the receiver end
• CPC Class Codes: H04L 25/03834 using pulse shaping
• CPC Class Codes: H04L 25/38 Synchronous or start-stop systems, e.g. for Baudot code
• CPC Class Codes: H04L 27/0014 Carrier regulation of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657

Abstract

The disclosed invention provides apparatus and methods that can convert frequencies of time-encoded signals. In one aspect, a down-converter circuit includes low-pass filters, a switch, a time encoder, and an output low-pass filter. In another aspect, an up-converter circuit includes an analog or digital input time encoder, low-pass filters, a switch, an output time encoder, and a time-encoded band-pass filter. In yet another aspect, a complete receiver system is provided. The receiver system can operate effectively with signals in the radio frequency range.

Claims

1. A down-converter circuit comprising:

(i) at least two low-pass filters;

(ii) a switch;

(iii) a time encoder; and

(iv) an output low-pass filter.

2. The circuit of claim 1, wherein said circuit is capable of down-converting in frequency a time-encoded signal and converting said signal into analog format.

3. The circuit of claim 1, wherein said circuit is capable of receiving a time-encoded signal in differential format.

4. The circuit of claim 3, wherein said signal is generated by a differential output time encoder or by a time-encoded filter with differential output.

5. The circuit of claim 1, wherein said at least two low-pass filters (i) are capable of rejecting an asynchronous pulse frequency of an input signal.

6. The circuit of claim 1, wherein said time encoder (iii) is capable of generating a square wave and controlling said switch (ii).

7. The circuit of claim 1, wherein said time encoder (iii) includes an external frequency reference.

8. An up-converter circuit comprising:

(i) an analog or digital input time encoder;

(ii) at least two low-pass filters;

(iii) a switch;

(iv) a second time encoder; and

(v) a time-encoded band-pass filter.

9. The circuit of claim 8, wherein said circuit is capable of up-converting in frequency an analog or digital signal and converting said signal into time-encoded format.

10. The circuit of claim 8, wherein said input time encoder (i) is capable of providing differential output.

11. The circuit of claim 8, wherein said time encoder (iv) is locked to a frequency reference.

12. The circuit of claim 8, wherein said time encoder (iv) is capable of generating a square wave and controlling said switch (iii).

13. The circuit of claim 8, wherein said time-encoded band-pass filter (v) is programmable.

14. A receiver system comprising:

(a) an antenna;

(b) a filter;

(c) a time encoder;

(d) a router of time-encoded signals;

(e) a plurality of programmable time-encoder filters including at least one time-encoded input and at least one time-encoded output; and

(f) a plurality of circuits, each circuit comprising at least two low-pass filters, a switch, a time encoder, and an output low-pass filter.

15. The receiver system of claim 14, wherein said circuits (f) are capable of down-converting in frequency time-encoded signals and converting said signals into analog format.

16. The receiver system of claim 14, wherein said time encoder contained in element (f) is capable of generating a square wave and controlling said switch.

17. The receiver system of claim 14, wherein said time encoder contained in element (f) includes an external frequency reference.

18. The receiver system of claim 14, wherein said circuits (f) are capable of operating with a pulse rate of at least 20 GHz.

19. The receiver system of claim 14, wherein said circuits (f) are capable of operating with a pulse rate of at least 50 GHz.

20. A receiver system as claimed in claim 14 which can operate effectively with signals in the radio frequency range.