Methods of manufacturing an oxide semiconductor thin film transistor

• US 20090142887A1
• Filed: 05/22/2008
• Published: 06/04/2009
• Est. Priority Date: 12/03/2007
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Ryu, Myung-kwan, Lee, Sang-yoon, Son, Kyoung-seok, Jung, Ji-sim, Kim, Tae-sang, Park, Kyung-bae, Kwon, Jang-yeon
• Granted Patent: US 7,767,505 B2
• Time in Patent Office: Days
• US Class Current: 438/151
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Methods of manufacturing an oxide semiconductor thin film transistor are provided. The methods include forming a gate on a substrate, and a gate insulating layer on the substrate to cover the gate. A channel layer, which is formed of an oxide semiconductor, may be formed on the gate insulating layer. Source and drain electrodes may be formed on opposing sides of the channel layer. The method includes forming supplying oxygen to the channel layer, forming a passivation layer to cover the source and drain electrodes and the channel layer, and performing an annealing process after forming the passivation layer.

Claims

1. A method of manufacturing an oxide semiconductor thin film transistor, the method comprising:

forming a gate on a substrate;

forming a gate insulating layer on the substrate such that the gate insulating layer covers the gate;

forming a channel layer on the gate insulating layer, the channel layer being formed of an oxide semiconductor;

forming source and drain electrodes on opposing sides of the channel layer;

supplying oxygen to the channel layer;

forming a passivation layer that covers the source and drain electrodes and the channel layer; and

annealing the oxide semiconductor thin film transistor after forming the passivation layer.

2. The method of claim 1, wherein supplying the oxygen includes performing a plasma process prior to forming the passivation layer over the channel layer.

3. The method of claim 2, wherein the oxide semiconductor is an oxide compound selected from the group consisting of zinc oxide, tin oxide, Ga—

In—

Zn oxide, In—

Zn oxide, In—

Sn oxide and combinations thereof.

4. The method of claim 3, wherein the oxide compound is doped with at least one metal selected from the group consisting of aluminum (Al), nickel (Ni), copper (Cu), tantalum (Ta), hafnium (Hf), titanium (Ti) and combinations thereof.

5. The method of claim 2, wherein a gas that includes oxygen ions is used in the plasma process.

6. The method of claim 5, wherein the plasma process is an N₂O plasma process.

7. The method of claim 2, wherein the passivation layer is at least one selected from the group consisting of a silicon oxide layer, a silicon nitride layer and an organic insulating layer.

8. The method of claim 2, wherein annealing is performed at a temperature of approximately 150°

C.-500°

C.

9. The method of claim 8, wherein annealing is performed at a temperature of approximately 150°

C.-400°

C.

10. The method of claim 1, wherein supplying the oxygen includes injecting ions containing the oxygen into the channel layer, the passivation layer being formed prior to injecting the oxygen-containing ions and annealing being performed after injecting the oxygen-containing ions.

11. The method of claim 10, wherein the oxide semiconductor is an oxide compound selected from the group consisting of zinc oxide, tin oxide, Ga—

In—

Zn oxide, In—

Zn oxide, In—

Sn oxide and combinations thereof.

12. The method of claim 11, wherein the oxide compound is doped with at least one selected from the group consisting of aluminum (Al), nickel (Ni), copper (Cu), tantalum (Ta), hafnium (Hf), titanium (Ti) and combinations thereof.

13. The method of claim 10, wherein the oxygen-containing ions are injected through the passivation layer using an ion injection apparatus.

14. The method of claim 13, wherein injecting the oxygen-containing ions substantially increases a density of the oxygen-containing ions between the passivation layer and the channel layer.

15. The method of claim 10, wherein injecting the oxygen-containing ions substantially increases a density of the oxygen-containing ions between the passivation layer and the channel layer.

16. The method of claim 10, wherein the passivation layer is at least one selected from the group consisting of a silicon oxide layer, a silicon nitride layer and an organic insulating layer.

17. The method of claim 10, wherein annealing is performed at a temperature of approximately 150°

C.-500°

C.

18. The method of claim 17, wherein annealing is performed at a temperature of approximately 150°

C.-400°

C.