Method and system supporting production of a semiconductor device using a plurality of fabrication processes
First Claim
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1. A tuning method for use by a semiconductor device capable of being fabricated using a plurality of fabrication processes, the method comprising:
- reading by the semiconductor device, a fabrication identification included in the semiconductor device;
associating the fabrication identification with one of the plurality of fabrication processes to determine an associated fabrication process used for fabrication of the semiconductor device; and
tuning at least one parameter of the semiconductor device based on the associated fabrication process.
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Abstract
There is provided a tuning method for use by a semiconductor device capable of being fabricated using a plurality of fabrication processes comprising reading a fabrication identification included in the semiconductor device, associating the fabrication identification with one of the plurality of fabrication processes to determine an associated fabrication process used for fabrication of the semiconductor device, and tuning at least one parameter of the semiconductor device based on the associated fabrication process.
20 Citations
20 Claims
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1. A tuning method for use by a semiconductor device capable of being fabricated using a plurality of fabrication processes, the method comprising:
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reading by the semiconductor device, a fabrication identification included in the semiconductor device; associating the fabrication identification with one of the plurality of fabrication processes to determine an associated fabrication process used for fabrication of the semiconductor device; and tuning at least one parameter of the semiconductor device based on the associated fabrication process. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A circuit capable of being patterned on a semiconductor die using a plurality of fabrication processes, the circuit comprising:
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a digital circuitry; an analog circuitry; a fabrication identification, wherein the fabrication associates the circuit with one of the plurality of fabrication processes used for fabrication of the circuit; and an interface circuitry interfacing the digital circuitry with the analog circuitry, the interface circuitry for use by the digital circuitry to tune the analog circuitry based on the fabrication identification. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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16. A circuit capable of being patterned on a semiconductor die using a plurality of fabrication processes, the circuit comprising:
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a fabrication identification, wherein the fabrication associates the circuit with one of the plurality of fabrication processes used for fabrication of the circuit; and a read-only-memory (ROM); a fabrication identification firmware in the ROM, the fabrication identification firmware designed to read the fabrication identification and associate the fabrication identification with one of plurality of fabrication processes to determine an associated fabrication process, the fabrication identification firmware further designed to tune the circuit based on the associated fabrication process. - View Dependent Claims (17, 18, 19, 20)
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Specification