CLOCK CALIBRATION IN SLEEP MODE

• US 20090147899A1
• Filed: 11/12/2008
• Published: 06/11/2009
• Est. Priority Date: 12/05/2007
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Agere Systems Incorporated (Broadcom, Inc.)
• Inventors: Kalil, Doron, Arviv, Binyamin, Orian, Efraim, Yair, Eyal
• Granted Patent: US 8,170,165 B2
• Time in Patent Office: Days
• US Class Current: 375/359
• CPC Class Codes: H03L 1/00 Stabilisation of generator output against variations of physical values, e.g. power supply
• CPC Class Codes: H03L 7/00 Automatic control of frequency or phase; Synchronisation
• CPC Class Codes: H04W 52/029 reducing the clock frequency of the controller
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

In one embodiment, an improvement is described for synchronization between devices in, e.g., a wireless network, wherein at least one device includes both a slow clock and a fast clock for different modes of operation. The fast clock for an active mode of operation is calibrated after a sleep mode of operation during which the slow clock is employed for device timing. Calibration employs a filter-based technique. Counts for the slow clock and for the fast clock are measured over a first interval, and the number of slow-clock counts is measured over a second interval. An estimate for the number of fast counts over the second interval is generated, filtered to reduce noise and error effects, and then employed to update the fast clock in the active mode of operation.

Claims

1. A method for calibrating a second clock based on a first clock, the method comprising:

(a) measuring a number L of counts of the first clock during a first interval;

(b) measuring a number M(n) of counts of the second clock during a second interval, wherein the second interval corresponds in length to N counts of the first clock;

(c) applying filtering to the number M(n) of counts of the second clock to generate a filtered count F(n); and

(d) updating the second clock based on L, N, and F(n).

2. The invention of claim 1, wherein:

the first interval is a predefined period corresponding to a sleep mode of a wireless device; and

the second interval is a predefined period of time corresponding to a transition from the sleep mode to an awake mode of the wireless device.

3. The invention of claim 2, wherein step (b) is repeated for each transition from the sleep mode to the awake mode.

4. The invention of claim 2, wherein step (b) is repeated after determining that a specified number of transitions from the sleep mode to the awake mode have occurred, wherein the specified number is greater than one.

5. The invention of claim 1, wherein:

the second clock is stopped during the first interval; and

in step (d), updating of the second clock corresponds to a number T of counts that would have registered had the second clock not been stopped.

6. The invention of claim 1, wherein the first clock is a slow clock and the second clock is a fast clock.

7. The invention of claim 1, wherein updating of the second clock is proportional to F(n)*L/N.

8. The invention of claim 1, wherein, the filtered count F(n) is proportional to:

aF(n−

1)+(1−

a)M(n), wherein;

a is a filter weight parameter having a value between 0 and 1; and

F(n−

1) is a filtered count of the second clock for a previous iteration n.

9. The invention of claim 8, wherein the filter weight parameter a is selected based on at least one of measurement rate, temperature, and device state.

10. The invention of claim 1, wherein, in step (c), the filtered count F(n) is proportional to:

y(n)+F(−

1), where

y(n)=ay(n−

1)+(1−

a)x(n);

x(n)=M(n)−

F(−

1);

a is a filter weight parameter having a value between 0 and 1; and

F(−

1) is an initial filter state.

11. The invention of claim 1, wherein:

the first interval is a predefined period corresponding to a sleep mode of a wireless device;

the second interval is a predefined period of time corresponding to a transition from the sleep mode to an awake mode of the wireless device;

the first clock is a slow clock and the second clock is a fast clock;

the second clock is stopped during the first interval;

in step (d), updating of the second clock corresponds to a number T of counts that would have registered had the second clock not been stopped, where T is proportional to F(n)*L/N; and

the filtered count F(n) is proportional to;

aF(n−

1)+(1−

a)M(n), wherein;

a is a filter weight parameter having a value between 0 and 1; and

F(n−

1) is a filtered count of the second clock for a previous iteration n.

12. An apparatus for calibrating a second clock based on a first clock, the apparatus comprising:

a measurement generator adapted to;

(i) measure a number L of counts of the first clock during a first interval;

(ii) measure a number M(n) of counts of the second clock during a second interval, wherein the second interval corresponds in length to N counts of the first clock;

a filter adapted to apply filtering to the number M(n) of counts of the second clock to generate a filtered count F(n); and

an update generator adapted to update the second clock based on L, N, and F(n).

13. The invention of claim 12, wherein:

the first interval is a predefined period of time corresponding to a sleep mode of a wireless device; and

the second interval is a predefined period of time corresponding to a transition from the sleep mode to an awake mode of the wireless device.

14. The invention of claim 12, wherein:

the second clock is stopped during the first interval; and

updating of the second clock corresponds to a number T of counts that would have registered had the second clock not been stopped.

15. The invention of claim 12, wherein the first clock is a slow clock and the second clock is a fast clock.

16. The invention of claim 12, wherein updating of the second clock is proportional to F(n)*L/N.

17. The invention of claim 12, wherein the filtered count F(n) is proportional to:

α

F(n−

1)+(1−

α

)M(n), wherein;

a is a filter weight parameter having a value between 0 and 1; and

F(n−

1) is a filtered count of the second clock for a previous iteration n.

18. The invention of claim 12, wherein the filtered count F(n) is proportional to:

y(n)+F(−

1), where

y(n)=α

y(n−

1)+(1−

α

)x(n);

x(n)=M(n)−

F(−

1);

a is a filter weight parameter having a value between 0 and 1; and

F(−

1) is an initial filter state.

19. The invention of claim 12, wherein the apparatus is an integrated circuit.

20. The invention of claim 12, wherein:

the first interval is a predefined period corresponding to a sleep mode of a wireless device;

the second interval is a predefined period of time corresponding to a transition from the sleep mode to an awake mode of the wireless device;

the first clock is a slow clock and the second clock is a fast clock;

the second clock is stopped during the first interval;

updating of the second clock corresponds to a number T of counts that would have registered had the second clock not been stopped, where T is proportional to F(n)*L/N; and

the filtered count F(n) is proportional to;

aF(n−

1)+(1−

a)M(n), wherein;

a is a filter weight parameter having a value between 0 and 1; and

F(n−

1) is a filtered count of the second clock for a previous iteration n.