METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

• US 20090148970A1
• Filed: 10/21/2008
• Published: 06/11/2009
• Est. Priority Date: 10/23/2007
• Status: Abandoned Application

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Hosoya, Kunio, Fujikawa, Saishi, Chiba, Yoko
• Application Number:
  US12/255,312
• Publication Number:
  US 20090148970A1
• Time in Patent Office: Days
• US Class Current: 438/29
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate

Abstract

To provide a manufacturing method of a highly reliable TFT, by which a more refined pattern can be formed through a process using four or three masks, and a semiconductor device. A channel-etched bottom gate TFT structure is adopted in which a photoresist is selectively exposed to light by rear surface exposure utilizing a gate wiring to form a desirably patterned photoresist, and further, a halftone mask or a gray-tone mask is used as a multi-tone mask. Further, a step of lifting off using a halftone mask or a gray-tone mask and a step of reflowing a photoresist are used.

Claims

1. A method for manufacturing a semiconductor device, comprising:

forming a first conductive film over a substrate;

etching the first conductive film using a first photoresist to form a gate electrode;

forming a gate insulating film over the gate electrode;

forming a first semiconductor layer over the gate insulating film;

forming a second semiconductor layer including an impurity element imparting one conductivity type over the first semiconductor layer;

performing rear surface exposure to form a second photoresist;

etching the first semiconductor layer and the second semiconductor layer including the impurity element imparting one conductivity type using the second photoresist, thereby forming a first semiconductor island and a second semiconductor island including the impurity element imparting one conductivity type;

forming a second conductive film over the substrate;

forming a third photoresist using a multi-tone mask over the second conductive film;

etching the second conductive film using the third photoresist;

ashing the third photoresist;

etching the second conductive film using the ashed third photoresist to form a source electrode and a drain electrode; and

etching the first semiconductor island and the second semiconductor island including the impurity element imparting one conductivity type using the ashed third photoresist to form a channel region, a source region, and a drain region.

2. The method for manufacturing a semiconductor device, according to claim 1, wherein the multi-tone mask is a halftone mask or a gray-tone mask.

3. The method for manufacturing a semiconductor device, according to claim 1, wherein the rear surface exposure is performed through the first semiconductor layer and the second semiconductor layer including the impurity element imparting one conductivity type.

4. The method for manufacturing a semiconductor device, according to claim 1, wherein the first semiconductor layer is an amorphous semiconductor layer.

5. The method for manufacturing a semiconductor device, according to claim 1, wherein the first semiconductor layer is an i-type amorphous silicon layer.

6. A method for manufacturing a semiconductor device, comprising:

forming a first conductive film over a substrate;

etching the first conductive film using a first photoresist to form a gate electrode;

forming a gate insulating film over the gate electrode;

forming a first semiconductor layer over the gate insulating film;

forming a second semiconductor layer including an impurity element imparting one conductivity type over the first semiconductor layer;

performing rear surface exposure to form a second photoresist;

etching, using the second photoresist, the first semiconductor layer and the second semiconductor layer including the impurity element imparting one conductivity type, thereby forming a first semiconductor island and a second semiconductor island including the impurity element imparting one conductivity type;

forming a second conductive film over the substrate;

forming a third photoresist using a multi-tone mask over the second conductive film;

etching, using the third photoresist, the second conductive film, the second semiconductor island including the impurity element imparting one conductivity type, and the first semiconductor island to form a wiring;

ashing the third photoresist;

etching the second conductive film using the ashed third photoresist to form a source electrode and a drain electrode;

etching the second semiconductor island including the impurity element imparting one conductivity type and the first semiconductor island using the ashed third photoresist to form a channel region, a source region, and a drain region;

forming a protective film over the substrate;

forming a contact hole in the protective film using a fourth photoresist;

forming a third conductive film over the protective film; and

etching the third conductive film using a fifth photoresist to form a pixel electrode.

7. The method for manufacturing a semiconductor device, according to claim 6, wherein the multi-tone mask is a halftone mask or a gray-tone mask.

8. The method for manufacturing a semiconductor device, according to claim 6, wherein the rear surface exposure is performed through the first semiconductor layer and the second semiconductor layer including the impurity element imparting one conductivity type.

9. The method for manufacturing a semiconductor device, according to claim 6, wherein the first semiconductor layer is an amorphous semiconductor layer.

10. The method for manufacturing a semiconductor device, according to claim 6, wherein the first semiconductor layer is an i-type amorphous silicon layer.

11. The method for manufacturing a semiconductor device, according to claim 6, wherein the pixel electrode is a transparent conductive film.

12. A method for manufacturing a semiconductor device, comprising:

forming a first conductive film over a substrate;

etching the first conductive film using a first photoresist to form a gate electrode;

forming a gate insulating film over the gate electrode;

forming a first semiconductor layer over the gate insulating film;

forming a second semiconductor layer including an impurity element imparting one conductivity type over the first semiconductor layer;

performing first rear surface exposure to form a second photoresist;

etching, using the second photoresist, the first semiconductor layer and the second semiconductor layer including the impurity element imparting one conductivity type, thereby forming a first semiconductor island and a second semiconductor island including the impurity element imparting one conductivity type;

forming a second conductive film over the substrate;

forming a third photoresist using a first multi-tone mask over the second conductive film;

etching, using the third photoresist, the second conductive film, the second semiconductor island including the impurity element imparting one conductivity type, and the first semiconductor island;

ashing the third photoresist;

etching the second conductive film using the ashed third photoresist to form a source electrode and a drain electrode;

etching the second semiconductor island including the impurity element imparting one conductivity type and the first semiconductor island using the ashed third photoresist to form a channel region, a source region, and a drain region;

forming a fourth photoresist using a second multi-tone mask;

ashing the fourth photoresist;

forming a third conductive film over the second conductive film and the fourth photoresist;

removing the fourth photoresist and part of the third conductive film formed thereon to form a pixel electrode;

forming a protective film over the substrate;

performing second rear surface exposure to form a fifth photoresist over the protective film;

performing a reflow process on the fifth photoresist; and

etching the protective film using the fifth photoresist subjected to the reflow process.

13. The method for manufacturing a semiconductor device, according to claim 12, wherein each of the first and second multi-tone masks is a halftone mask or a gray-tone mask.

14. The method for manufacturing a semiconductor device, according to claim 12, wherein the first rear surface exposure is performed through the first semiconductor layer and the second semiconductor layer including the impurity element imparting one conductivity type.

15. The method for manufacturing a semiconductor device, according to claim 12, wherein the first semiconductor layer is an amorphous semiconductor layer.

16. The method for manufacturing a semiconductor device, according to claim 12, wherein the first semiconductor layer is an i-type amorphous silicon layer.

17. The method for manufacturing a semiconductor device, according to claim 12, wherein the pixel electrode is a transparent conductive film.

18. A method for manufacturing a semiconductor device, comprising:

forming a first conductive film over a substrate;

etching the first conductive film using a first photoresist to form a gate electrode and a wiring;

forming a gate insulating film over the gate electrode and a first wiring;

forming a first semiconductor layer over the gate insulating film;

forming a second semiconductor layer including an impurity element imparting one conductivity type over the first semiconductor layer;

performing first rear surface exposure to form a second photoresist;

etching, using the second photoresist, the first semiconductor layer and the second semiconductor layer including the impurity element imparting one conductivity type, thereby forming a first semiconductor island and a second semiconductor island including the impurity element imparting one conductivity type over the gate electrode and forming a third semiconductor island and a fourth semiconductor island including the impurity element imparting one conductivity type over the first wiring;

forming a second conductive film over the substrate;

forming a third photoresist using a first multi-tone mask over the second conductive film;

etching, using the third photoresist, a part of the second conductive film and the fourth semiconductor island including the impurity element imparting one conductivity type and the third semiconductor island over the first wiring;

ashing the third photoresist;

etching the second conductive film using the ashed third photoresist to form a source electrode and a drain electrode;

etching the second semiconductor island including the impurity element imparting one conductivity type and the first semiconductor island using the ashed third photoresist to form a channel region, a source region, and a drain region;

forming a fourth photoresist using a second multi-tone mask over the substrate;

etching part of the gate insulating film, which is not covered with the fourth photoresist, using the fourth photoresist to form a contact hole over the first wiring;

ashing the fourth photoresist;

forming a third conductive film over the second conductive film and the fourth photoresist;

removing the fourth photoresist and parts of the third conductive film formed on the fourth photoresist to form a pixel electrode and a second wiring;

forming a protective film over the substrate;

performing second rear surface exposure to form a fifth photoresist over the protective film;

performing a reflow process on the fifth photoresist; and

etching the protective film using the fifth photoresist subjected to the reflow process.

19. The method for manufacturing a semiconductor device, according to claim 18, wherein each of the first and second multi-tone masks is a halftone mask or a gray-tone mask.

20. The method for manufacturing a semiconductor device, according to claim 18, wherein the first rear surface exposure is performed through the first semiconductor layer and the second semiconductor layer including the impurity element imparting one conductivity type.

21. The method for manufacturing a semiconductor device, according to claim 18, wherein the first semiconductor layer is an amorphous semiconductor layer.

22. The method for manufacturing a semiconductor device, according to claim 18, wherein the first semiconductor layer is an i-type amorphous silicon layer.

23. The method for manufacturing a semiconductor device, according to claim 18, wherein the pixel electrode is a transparent conductive film.