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METHOD FOR MODELING PERFORMANCE OF EMBEDDED PROCESSORS HAVING COMBINED CACHE AND MEMORY HIERARCHY

  • US 20090150135A1
  • Filed: 12/05/2007
  • Published: 06/11/2009
  • Est. Priority Date: 12/05/2007
  • Status: Active Grant
First Claim
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1. A method comprising:

  • allocating firmware objects between different types of memory based on a frequency of access of each firmware object in trace data.

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