FERROELECTRIC STACKED-LAYER STRUCTURE, FIELD EFFECT TRANSISTOR, AND FERROELECTRIC CAPACITOR AND FABRICATION METHODS THEREOF

• US 20090152607A1
• Filed: 12/04/2008
• Published: 06/18/2009
• Est. Priority Date: 12/18/2007
• Status: Abandoned Application

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: TANAKA, Hiroyuki, Kato, Yoshihisa, Kaneko, Yukihiro
• Application Number:
  US12/328,275
• Publication Number:
  US 20090152607A1
• Time in Patent Office: Days
• US Class Current: 257/295
• CPC Class Codes: G11C 11/22 using ferroelectric elements
• CPC Class Codes: H01G 4/1227 based on alkaline earth titanates
• CPC Class Codes: H01G 4/30 Stacked capacitors H01G4/33 takes precedence
• CPC Class Codes: H01L 28/56 the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
• CPC Class Codes: H01L 29/6684 with a ferroelectric gate insulator
• CPC Class Codes: H01L 29/78391 the gate comprising a layer which is used for its ferroelectric properties
• CPC Class Codes: Y10T 428/26 Web or sheet containing structurally defined element or component, the element or component having a specified physical dimension

Abstract

A ferroelectric stacked-layer structure is fabricated by forming a first polycrystalline ferroelectric film on a polycrystalline or amorphous substrate, and after planarizing a surface of the first ferroelectric film, laminating on the first ferroelectric film a second thin ferroelectric film having the same crystalline structure as the first ferroelectric film. A field effect transistor or a ferroelectric capacitor includes the ferroelectric stacked-layer structure as a gate insulating film or a capacitor film.

Claims

1. A method for fabricating a ferroelectric stacked-layer structure, comprising:

(a) forming a first polycrystalline ferroelectric film on a polycrystalline or amorphous substrate;

(b) planarizing a surface of the first ferroelectric film;

(c) stacking on the planarized first ferroelectric film a second thin ferroelectric film having the same crystalline structure as the first ferroelectric film.

2. The method of claim 1, wherein a crystal orientation of the first ferroelectric film and a crystal orientation of the second ferroelectric film are aligned.

3. The method of claim 1, wherein the first ferroelectric film and the second ferroelectric film are formed of the same element.

4. The method of claim 1, wherein a thickness of the second ferroelectric film is in a range of 1 nm to 60 nm.

5. The method of claim 1, wherein the second ferroelectric film has a function of reducing a carrier trap level generated by a crystal defect on the planarized surface of the first ferroelectric film.

6. The method of claim 1, wherein in the step (b), a surface roughness of the planarized first ferroelectric film is 1 nm or less in an RMS value.

7. The method of claim 1, wherein the substrate includes a polycrystalline or amorphous film over its surface.

8. The method of claim 1, wherein the step (a) includes forming an amorphous ferroelectric film on the substrate and then subjecting the amorphous ferroelectric film to a heat treatment for crystallization to form the first polycrystalline ferroelectric film.

9. The method of claim 1, wherein the first ferroelectric film and the second ferroelectric film are formed of a ferroelectric material having a perovskite structure.

10. A ferroelectric stacked-layer structure formed on a polycrystalline or amorphous substrate, comprising:

a first polycrystalline ferroelectric film; and

a second thin ferroelectric film stacked on the first ferroelectric film,

wherein the first ferroelectric film has a planarized surface, and

the second ferroelectric film has the same crystalline structure as the first ferroelectric film.

11. The ferroelectric stacked-layer structure of claim 10, wherein a crystal orientation of the first ferroelectric film and a crystal orientation of the second ferroelectric film are aligned.

12. The ferroelectric stacked-layer structure of claim 10, wherein the first ferroelectric film and the second ferroelectric film are formed of the same element.

13. The ferroelectric stacked-layer structure of claim 10, wherein a thickness of the second ferroelectric film is in a range of 1 nm to 60 nm.

14. The ferroelectric stacked-layer structure of claim 10, wherein the second ferroelectric film has a function of reducing a carrier trap level generated by a crystal defect on the planarized surface of the first ferroelectric film.

15. A method for fabricating a field effect transistor, comprising:

(a) forming a gate electrode on a substrate;

(b) forming a first polycrystalline ferroelectric film on the substrate so as to cover the gate electrode;

(c) planarizing a surface of the first ferroelectric film;

(d) stacking, on the planarized first ferroelectric film, a second thin ferroelectric film having the same crystalline structure as the first ferroelectric film;

(e) forming a semiconductor film on the second ferroelectric film; and

(f) forming a source/drain electrode on the semiconductor film,

wherein the first ferroelectric film and the second ferroelectric film constitute a ferroelectric stacked-layer structure which serves as a gate insulating film of the field effect transistor.

16. The method of claim 15, wherein a crystal orientation of the first ferroelectric film and a crystal orientation of the second ferroelectric film are aligned.

17. The method of claim 15, wherein the first ferroelectric film and the second ferroelectric film are formed of the same element.

18. The method of claim 15, wherein a thickness of the second ferroelectric film is in a range of 1 nm to 60 nm.

19. A method for fabricating a ferroelectric capacitor, comprising:

(a) forming a first conductive film on a substrate;

(b) forming a first polycrystalline ferroelectric film on the first conductive film;

(c) planarizing a surface of the first ferroelectric film;

(d) stacking, on the planarized first ferroelectric film, a second thin ferroelectric film having the same crystalline structure as the first ferroelectric film; and

(e) forming a second conductive film on the second ferroelectric film,

wherein the first ferroelectric film and the second ferroelectric film constitute a ferroelectric stacked-layer structure which serves as a capacitor film of the ferroelectric capacitor.

20. The method of claim 19, wherein a crystal orientation of the first ferroelectric film and a crystal orientation of the second ferroelectric film are aligned.

21. The method of claim 19, wherein the first ferroelectric film and the second ferroelectric film are formed of the same element.

22. The method of claim 19, wherein a thickness of the second ferroelectric film is in a range of 1 nm to 60 nm.

23. A field effect transistor of which a gate insulating film has a ferroelectric stacked-layer structure, the ferroelectric stacked-layer structure comprising:

a first polycrystalline ferroelectric film; and

a second thin ferroelectric film stacked on the first ferroelectric film,

wherein the first ferroelectric film has a planarized surface,

the second ferroelectric film has the same crystalline structure as the first ferroelectric film,

a semiconductor film is further formed on the second ferroelectric film, and

an interface between the second ferroelectric film and the semiconductor film serves as a channel of the field effect transistor.

24. A ferroelectric capacitor of which a capacitor film has a ferroelectric stacked-layer structure, the ferroelectric stacked-layer structure comprising:

a first polycrystalline ferroelectric film; and

a second thin ferroelectric film stacked on the first ferroelectric film,

wherein the first ferroelectric film has a planarized surface, and

the second ferroelectric film has the same crystalline structure as the first ferroelectric film.