ANALOG/DIGITAL CONVERTER AND INFORMATION RECORDING AND REPRODUCING APPARATUS

• US 20090153387A1
• Filed: 12/09/2008
• Published: 06/18/2009
• Est. Priority Date: 12/13/2007
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: TAYU, Kenichi
• Granted Patent: US 7,889,110 B2
• Time in Patent Office: Days
• US Class Current: 341/159
• CPC Class Codes: G11B 7/0037 with discs
• CPC Class Codes: H03M 1/0809 of bubble errors, i.e. irregularities in thermometer codes
• CPC Class Codes: H03M 1/362 the reference values being generated by a resistive voltage divider
• CPC Class Codes: H03M 7/06 the radix thereof being a positive integer different from two

Abstract

The present invention provides an A/D converter includes: a plurality of comparators for comparing a plurality of respective standard voltages with an analog input value for a magnitude thereof, the comparators being arranged depending on magnitudes of the standard voltages; a logic boundary detector for detecting a logic boundary point where output signals from the comparators change from one level to another level; and a plurality of majority circuits for being supplied with the output signals from the comparators and determining output signals based on a majority vote on the output signals from the comparators, the majority circuits having logic threshold values adjusted for respective input terminals thereof which are supplied with the output signals from the comparators.

Claims

1. An analog/digital converter comprising:

a plurality of comparators for comparing a plurality of respective standard voltages with an analog input value for a magnitude thereof, the comparators being arranged depending on magnitudes of the standard voltages;

a logic boundary detector for detecting a logic boundary point where output signals from the comparators change from one level to another level; and

a plurality of majority circuits for being supplied with the output signals from the comparators and determining output signals based on a majority vote on the output signals from the comparators, the majority circuits having logic threshold values adjusted for respective input terminals thereof which are supplied with the output signals from the comparators.

2. The analog/digital converter according to claim 1, wherein each of the majority circuits comprises a plurality of metal oxide semiconductor transistors, and each of the logic threshold values is adjusted by changing the ratio of a channel width to a channel length of one of the metal oxide semiconductor transistors.

3. The analog/digital converter according to claim 1, wherein each of the majority circuits has three terminals which are supplied with respective output signals from three of the comparators, the logic threshold value for one of the three terminals which is supplied with the output signal from one of the three comparators which has an intermediate one of the standard voltages serves as a standard threshold value, the logic threshold value for one of the remaining two terminals which is supplied with the output signal from one of the remaining two comparators is set to a level lower than the standard threshold value, and the logic threshold value for the other of the remaining two terminals which is supplied with the output signal from the other of the remaining two comparators is set to a level higher than the standard threshold value.

4. The analog/digital converter according to claim 2, wherein each of the majority circuits includes a selector having terminals for being supplied with the output signals from the remaining two comparators, the terminals of the selector being switchable around depending on a high-order bit or a low-order bit of the output signals from the comparators.

5. The analog/digital converter according to claim 4, wherein each of the majority circuits comprises a plurality of metal oxide semiconductor transistors, and each of the logic threshold values is adjusted by changing the ratio of a channel width to a channel length of one of the metal oxide semiconductor transistors.

6. An information recording and reproducing apparatus comprising:

an optical pickup for applying a light beam to a track on an optical recording medium, the optical pickup having a photodetector for detecting a light beam reflected from the optical recording medium; and

a reproducing circuit for acquiring a reproduced signal from a signal representing the detected light beam from the photodetector;

the reproducing circuit including an analog/digital converter;

the analog/digital converter including

a plurality of comparators for comparing a plurality of respective standard voltages with an analog input value for a magnitude thereof, the comparators being arranged depending on magnitudes of the standard voltages;

a logic boundary detector for detecting a logic boundary point where output signals from the comparators change from one level to another level; and

a plurality of majority circuits for being supplied with the output signals from the comparators and determining output signals based on a majority vote on the output signals from the comparators, the majority circuits having logic threshold values adjusted for respective input terminals thereof which are supplied with the output signals from the comparators.

7. An information recording and reproducing apparatus comprising:

an optical pickup for applying a light beam to a track on an optical recording medium, the optical pickup having a photodetector for detecting a light beam reflected from the optical recording medium; and

a wobble signal extracting circuit for acquiring a wobble signal from a signal representing the detected light beam from the photodetector;

the wobble signal extracting circuit including an analog/digital converter;

the analog/digital converter including

a plurality of comparators for comparing a plurality of respective standard voltages with an analog input value for a magnitude thereof, the comparators being arranged depending on magnitudes of the standard voltages;

a logic boundary detector for detecting a logic boundary point where output signals from the comparators change from one level to another level; and

a plurality of majority circuits for being supplied with the output signals from the comparators and determining output signals based on a majority vote on the output signals from the comparators, the majority circuits having logic threshold values adjusted for respective input terminals thereof which are supplied with the output signals from the comparators.