SYSTEM(S), METHOD(S), AND APPARATUS FOR ACCURATE DETECTION OF THE END OF STREAM

• US 20090154502A1
• Filed: 12/17/2007
• Published: 06/18/2009
• Est. Priority Date: 12/17/2007
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Inventors: Kumar, Vijay, Ross, Steven, Zhou, Jean
• Granted Patent: US 9,876,599 B2
• Time in Patent Office: Days
• US Class Current: 370/535
• CPC Class Codes: H04J 3/0602 Systems characterised by the synchronising information used
• CPC Class Codes: H04J 3/247 ATM or packet multiplexing
• CPC Class Codes: H04N 21/43072 of multiple content streams on the same device
• CPC Class Codes: H04N 21/434 Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream demultiplexing of data packets for data networks, e.g. RTP/UDP H04L65/00

Abstract

A multimedia presentation system for presenting multimedia data comprising a demultiplexing unit and at least one processing unit. The demultiplexing unit demultiplexes a plurality of streams of data. At least one presentation processing unit provides the plurality of stream of data for presentation according to predetermined timing and detecting an end of any one of the plurality of streams of data.

Claims

1. A circuit for presenting data, said circuit comprising:

an interface for receiving multiplexed packets from a media source, wherein said multiplexed packets carry a plurality of elementary streams multiplexed into a single multiplexed data stream; and

a controller for detecting the end points of said plurality of elementary streams in the multiplexed data stream received by the interface and appending markers to each elementary stream within the multiplexed data stream, said markers indicating the end points of each of said plurality of elementary streams, thereby resulting in a modified multiplexed data stream.

2. The circuit of claim 1, wherein the interface writes the modified multiplexed data stream to a RAM.

3. The circuit of claim 1, wherein appending markers further comprises writing the marker in multiplexed packet headers.

4. The circuit of claim 1, wherein appending markers further comprises adding additional packets to the multiplexed data stream.

5. The circuit of claim 1, further comprising:

a demultiplexing unit for receiving the modified multiplexed data stream and demultiplexing the multiplexed data streams, thereby resulting in demultiplexed elementary data streams; and

at least one presentation processing unit for providing the demultiplexed elementary data streams for presentation according to a predetermined timing and detecting the marker for each of said demultiplexed elementary streams.

6. The circuit of claim 5, wherein the demultiplexed elementary streams comprise an audio elementary stream and wherein the at least one presentation processing unit comprises:

an audio decoder for providing audio data for presentation, and wherein the audio decoder detects the marker in the audio elementary stream.

7. The circuit of claim 6, wherein the audio decoder decompresses the audio elementary stream.

8. The circuit of claim 5, wherein the demultiplexed elementary streams comprises a video elementary stream, and wherein the at least one presentation processing unit comprises:

a video processor for providing the video elementary stream for presentation, and wherein the video processor detects the marker in the video elementary stream.

9. The circuit of claim 8, wherein the at least one presentation processing unit further comprises:

a video decoder for decompressing the video elementary stream.

10. The circuit of claim 5, wherein the plurality of streams of data comprises a stream of graphics data, and wherein the at least one presentation processing unit comprises:

a graphics processor for providing graphics data for presentation, and wherein the graphics processor detects the marker in the stream of graphics data.

11. The circuit of claim 10, wherein the at least one presentation processing unit further comprises:

a graphics decoder for decompressing the stream of graphics data.

12. A method for presenting data, said method comprising:

receiving multiplexed packets from a media source, wherein said multiplexed packets carry a plurality of elementary streams multiplexed into a single multiplexed data stream; and

detecting the end points of said plurality of elementary streams in the multiplexed data stream received by the interface; and

appending markers to each elementary stream within the multiplexed data stream, said markers indicating the end points of each of said plurality of elementary streams, thereby resulting in a modified multiplexed data stream.

13. The method of claim 12, further comprising:

writing the modified multiplexed data stream to a RAM.

14. The method of claim 12, wherein appending further comprises writing the marker in multiplexed packet headers.

15. The method of claim 12, appending markers further comprises adding additional packets to the multiplexed data stream.

16. The method of claim 12, further comprising:

receiving the modified multiplexed data stream;

demultiplexing the multiplexed data streams, thereby resulting in demultiplexed elementary data streams;

providing the demultiplexed elementary data streams for presentation according to a predetermined timing; and

detecting the marker for each of said demultiplexed elementary streams.

17. The method of claim 16, wherein providing the demultiplexed data streams further comprises:

decompressing an audio elementary stream.

18. The method of claim 16, wherein providing the demultiplexed data streams further comprises:

decompressing a video elementary stream.

19. The method of claim 16, wherein providing the demultiplexed data streams further comprises:

decompressing a graphics stream.