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MEMORY HAVING IMPROVED READ CAPABILITY

  • US 20090157946A1
  • Filed: 12/12/2007
  • Published: 06/18/2009
  • Est. Priority Date: 12/12/2007
  • Status: Abandoned Application
First Claim
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1. A memory comprising:

  • a memory controller having a non-volatile memory for storing program code to initiate the operation of the memory controller, and having a first bus for receiving address signals from a host device;

    a second bus for interfacing with a RAM memory; and

    a third bus for interfacing with a NAND memory;

    a volatile RAM memory connected to said second bus;

    a NAND memory connected to said third bus;

    said controller for receiving commands and a first address from said first bus, and for mapping said first address to a second address in said NAND memory and for operating said NAND memory in response thereto, with said RAM memory serving as cache for data to or from the NAND memory;

    said controller for maintaining data coherence between the data stored in the RAM memory as cache and the data in the NAND memorya first buffer for storing data read from the NAND memory and for storing in the RAM memory; and

    a second buffer for storing data read from the RAM memory and for storing in the NAND memory.

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