Pre-Fetch Data and Pre-Fetch Data Relative
First Claim
Patent Images
1. A computer program product for executing a prefetch data machine instruction, the computer program product comprising:
- a storage medium readable by a processing circuit and storing instructions for execution by the processing circuit of a processor for performing a method comprising;
the processor fetching the prefetch data machine instruction, the prefetch data machine instruction comprising an opcode field, the opcode field specifying the prefetch data machine instruction; and
the processor executing the fetched prefetch data machine instruction adapted to either prefetch data to the cache or change access ownership of a cache line in the cache, the executing comprising;
determining whether to perform a data prefetch cache action or a cache line ownership operation, the data prefetch cache action for prefetching a cache line of data from, memory to the cache, the cache line ownership operation for changing cache access ownership of a line of data in the cache;
determining an address of an operand in memory; and
responsive to determining to perform the cache line ownership operation, performing a determined cache action on a cache line in the cache, the cache line associated with the determined address of the operand, the cache action comprising;
responsive to the determined cache action being a release store access ownership action, changing access ownership of the cache line to a fetch access ownership, the store access ownership indicating that the processor intends to store to the cache line, the fetch access ownership indicating that the processor intends to fetch data from the cache line; and
responsive to the determined cache action being a release fetch access ownership action, releasing access ownership, the released access ownership indicating that the processor does not intend to access to the cache line.
1 Assignment
0 Petitions
Accused Products
Abstract
A prefetch data machine instruction having an M field performs a function on a cache line of data specifying an address of an operand. The operation comprises either prefetching a cache line of data from memory to a cache or reducing the access ownership of store and fetch or fetch only of the cache line in the cache or a combination thereof. The address of the operand is either based on a register value or the program counter value pointing to the prefetch data machine instruction.
-
Citations
25 Claims
-
1. A computer program product for executing a prefetch data machine instruction, the computer program product comprising:
a storage medium readable by a processing circuit and storing instructions for execution by the processing circuit of a processor for performing a method comprising; the processor fetching the prefetch data machine instruction, the prefetch data machine instruction comprising an opcode field, the opcode field specifying the prefetch data machine instruction; and the processor executing the fetched prefetch data machine instruction adapted to either prefetch data to the cache or change access ownership of a cache line in the cache, the executing comprising; determining whether to perform a data prefetch cache action or a cache line ownership operation, the data prefetch cache action for prefetching a cache line of data from, memory to the cache, the cache line ownership operation for changing cache access ownership of a line of data in the cache; determining an address of an operand in memory; and responsive to determining to perform the cache line ownership operation, performing a determined cache action on a cache line in the cache, the cache line associated with the determined address of the operand, the cache action comprising; responsive to the determined cache action being a release store access ownership action, changing access ownership of the cache line to a fetch access ownership, the store access ownership indicating that the processor intends to store to the cache line, the fetch access ownership indicating that the processor intends to fetch data from the cache line; and responsive to the determined cache action being a release fetch access ownership action, releasing access ownership, the released access ownership indicating that the processor does not intend to access to the cache line. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
10. A computer system for executing a prefetch data machine instruction, the system comprising:
-
a memory; a cache in communication with the memory; and a processor in communication with the cache and the memory, the processor comprising an instruction fetching unit for accessing instructions from memory and one or more execution units for executing accessed instructions; wherein the processor performs a method comprising; fetching the prefetch data machine instruction, the prefetch data machine instruction comprising an opcode field, the opcode field specifying the prefetch data machine instruction; and executing the fetched prefetch data machine instruction adapted to either prefetch data to the cache or change access ownership of a cache line in the cache, the executing comprising; determining whether to perform a data prefetch cache action or a cache line ownership operation, the data prefetch cache action for prefetching a cache line of data from memory to the cache, the cache line ownership operation for changing cache access ownership of a line of data in the cache; determining an address of an operand in memory; and responsive to determining to perform the cache line ownership operation, performing a determined cache action on a cache line in the cache, the cache line associated with the determined address of the operand, the cache action comprising; responsive to the determined cache action being a release store access ownership action, changing access ownership of the cache line to a fetch access ownership, the store access ownership indicating that the processor intends to store to the cache line, the fetch access ownership indicating that the processor intends to fetch data from the cache line; and responsive to the determined cache action being a release retch access ownership action, releasing access ownership, the released access ownership indicating that the processor does not intend to access to the cache line. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
-
-
19. In a computer system having a processor, wherein the processor is associated with a cache for caching, cache lines of memory information, a method for executing a prefetch data machine instruction of a program, the method comprising:
-
fetching the prefetch data machine instruction, the prefetch data machine instruction comprising an opcode field, the opcode field specifying the prefetch data machine instruction; and executing the fetched prefetch data machine instruction adapted to either prefetch data to the cache or change access ownership of a cache line in the cache, the executing comprising; determining whether to perform a data prefetch cache action or a cache line ownership operation, the data prefetch cache action for prefetching a cache line of data from memory to the cache, the cache line ownership operation for changing cache access ownership of a line of data in the cache; determining an address of an operand in memory; and responsive to determining to perform the cache line ownership operation, performing a determined cache action on a cache line in the cache, the cache line associated with the determined address of the operand, the cache action comprising; responsive to the determined cache action being a release store access ownership action, changing access ownership of the cache line to a fetch access ownership, the store access ownership indicating that the processor intends to store to the cache line, the fetch access ownership indicating that the processor intends to fetch data from the cache line; and responsive to the determined cache action being a release fetch access ownership action, releasing access ownership, the released access ownership indicating that the processor does not intend to access to the cache line. - View Dependent Claims (20, 21, 22, 23, 24, 25)
-
Specification