Dice Rearrangement Package Structure Using Layout Process to Form a Compliant Configuration

• US 20090160043A1
• Filed: 08/14/2008
• Published: 06/25/2009
• Est. Priority Date: 12/20/2007
• Status: Active Grant

• Current Assignee: ChipMOS TECHNOLOGIES (Bermuda) LTD. (Chipmos), Chipmos Technologies Incorporated (Chipmos)
• Original Assignee: ChipMOS TECHNOLOGIES (Bermuda) LTD. (Chipmos), Chipmos Technologies Incorporated (Chipmos)
• Inventors: Chen, Yu-Ren, SHEN, GENG-SHIN
• Granted Patent: US 7,927,922 B2
• Time in Patent Office: Days
• US Class Current: 257/690
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/20 Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 2224/211 Disposition
• CPC Class Codes: H01L 2224/24137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
• CPC Class Codes: H01L 2224/92144 the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/20 Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 24/25 of a plurality of high density interconnect connectors
• CPC Class Codes: H01L 24/96 the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01094 : Plutonium [Pu]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/3511 : Warping
• CPC Class Codes: H01L 2933/005 : relating to encapsulations
• CPC Class Codes: H01L 2933/0066 : relating to arrangements for conducting electric current to or from the semiconductor body
• CPC Class Codes: H01L 33/486 : adapted for surface mounting
• CPC Class Codes: H01L 33/54 : having a particular shape

Abstract

A dice rearrangement package structure is provided, which a dice having an active surface and a bottom surface, and a plurality of pads is disposed on the active surface; a package body is provided to cover the dices and the plurality of pads being exposed; one ends of plurality of metal traces is electrically connected to the each pads; a protection layer is provided to cover the active surface and the other ends of the exposed metal traces is electrically connected to the plurality of conductive elements, the characteristic in that the package body is a B-stage material.

Claims

1. A dice rearrangement package method, comprising:

providing a first substrate having a top surface and a bottom surface, and a layer of polymer material disposed on said top surface of said first substrate;

providing a plurality of dices, each said plurality of dices having an active surface and a reverse side, and a plurality of pads disposed on said active surface;

picking and placing each said plurality of dices disposed on said layer of polymer material;

providing a second substrate having a top surface and a bottom surface, and a layer of B-stage material is disposed on said top surface of said second substrate;

performing an assembling process for said second substrate and said layer of B-stage material connecting to said top surface of said first substrate, so that said layer of B-stage material is covered each said plurality of dices;

performing a baking process to make said layer of B-stage material to form a solidified encapsulated body;

separating said layer of polymer material and said first substrate from said solidified encapsulated body to expose said plurality of pads on said active surface of said plurality of dices;

forming a plurality of fan-out metal traces, each said plurality of fan-out metal traces is electrically connected to said plurality of pads;

forming a protecting layer to cover said active surface of each said plurality of dices and each said plurality of metal traces and one ends of each said plurality of metal traces being exposed;

forming a plurality of connecting components is electrically connected to another ends of each said plurality of metal traces; and

cutting said encapsulated body to form a plurality of package structure independently.

2. The package method according to claim 1, wherein the material of said first substrate and said second substrate is selected from a group consisting of:

glass, wafer, and metal material.

3. The package method according to claim 1, further comprising a pre-curing process to make said B-stage with viscosity.

4. The package method according to claim 1, wherein the reverse side of each said plurality of dice is disposed a plurality of alignment marks.

5. The package method according to claim 1, further comprising separating said second substrate after the step of separating said first substrate.

6. The package method according to claim 1, wherein said encapsulated body is provided for encapsulating a dice.

7. The package method according to claim 1, wherein said encapsulated body is provided for encapsulating a plurality of dices.

8. The package method according to claim 7, wherein said plurality of dices with same dimensions.

9. The package method according to claim 8, wherein said plurality of dices is light emitting device (LED).

10. The package method according to claim 8, wherein said plurality of dices is dynamic random access memory (DRAM).

11. The package method according to claim 7, wherein said plurality of dices with different dimensions.

12. The package method according to claim 11, wherein said plurality of dices with different dimension is selected from a group consisting of:

microprocessor means, memory means, and memory controller means.

13. A dice rearrangement package method, comprising:

providing s first substrate having a top surface and a bottom surface, and said top surface is disposed a layer of sensitive material;

providing a plurality of dices, each said plurality of dices having an active surface and a reverse side, and a plurality of pads is disposed on said active surface;

picking and placing said plurality of dices, said active surface of each said plurality of dices is disposed on said layer sensitive material by flip chip technology;

providing a second substrate having a top surface and a bottom surface, and a B-stage material is on said top surface of said second substrate;

performing an assembling process for connecting said second substrate and said layer of B-stage material with said top surface of said first substrate and encapsulating each said plurality of dices;

performing a baking process to curing said layer of B-stage material to form a solidified encapsulated body;

separating said sensitive material from said encapsulated body to expose said plurality of pads on said active surface of said plurality of dices;

forming a plurality of fan-out metal traces, each said plurality of fan-out metal traces is electrically connected to said plurality of pads;

forming a protecting layer to cover said active surface of said plurality of dices and each said plurality of metal traces and one ends of each said plurality of fan-out metal traces is to be exposed;

forming a plurality of connecting components electrically connected to another ends of said plurality of fan-out metal traces; and

cutting said encapsulated body to form a plurality of package structure independently.

14. The package method according to claim 13, wherein the material of said first substrate and said second substrate is selected from the group consisting of:

glass, wafer, and metal material.

15. The package method according to claim 13, further comprising a pre-curing process to make said layer of B-stage material with viscosity.

16. The package method according to claim 13, wherein said reverse side of each said plurality of dices is disposed a plurality of alignment marks.

17. The package method according to claim 13, further comprising separating said second substrate after the step of separating said first substrate.

18. The package method according to claim 13, wherein said encapsulated body is provided for encapsulating a dice.

19. The package method according to claim 13, wherein said encapsulated body is encapsulating a plurality of dices.

20. The package method according to claim 19, wherein said plurality of dices with same dimension.

21. The package method according to claim 20, wherein said plurality of dices is light emitting device (LED).

22. The package method according to claim 20, wherein said plurality of dices is dynamic random access memory (DRAM).

23. The package method according to claim 19, wherein said plurality of dices with different dimension.

24. The package method according to claim 23, wherein said plurality of dices with different dimension is selected from a group consisting of:

microprocessor means, memory means, and memory controller means.

25. A dice rearrangement package method, comprising:

providing a first substrate having a top surface and a second surface, and a sensitive material is on said top surface of first substrate;

providing a plurality of dices, each said plurality of dices having an active surface and a reverse side and a plurality of pads is disposed on said active surface;

picking and placing said plurality of dices, said active surface of each said plurality of dices is flip to form on said sensitive material;

providing a second substrate having a top surface and a bottom surface, and a layer of polymer material is on said top surface;

forming an encapsulated body to assembling said layer of polymer material, said second substrate and said top surface of said first substrate and so that said layer of polymer material is covered each said plurality of dices and full between each said plurality of dices;

separating said first substrate to expose said sensitive material and said encapsulated body;

forming a plurality of openings on said sensitive material and said plurality of pads of each said plurality of dices;

forming a plurality of fan-out metal traces to make one ends of said plurality of fan-out metal traces electrically connecting said plurality of pads;

forming a protecting layer to cover said active surface of each said plurality of dices and expose another ends of each said plurality of fan-out metal traces;

forming a plurality of connecting components electrically connecting another ends of said plurality of fan-out metal traces; and

cutting an encapsulated body to form a plurality of encapsulated body independently.

26. The package method according to claim 25, wherein the material of first substrate and said second substrate is selected from the group consisting of:

glass, wafer, and metal material.

27. The package method according to claim 25, wherein said reverse side of each said plurality of dices is disposed a plurality of alignment marks.

28. The package method according to claim 25, further comprising separating said second substrate after the step of separating said first substrate.

29. The package method according to claim 25, further comprising a baking process to solidify said layer of polymer material.

30. The package method according to claim 25, wherein said encapsulated body is provided for encapsulating a dice.

31. The package method according to claim 25, wherein said encapsulated body is provided for encapsulating a plurality of dices.

32. The package method according to claim 31, wherein said plurality of dices with same dimensions.

33. The package method according to claim 32, wherein said plurality of dices is light emitting device (LED).

34. The package method according to claim 31, wherein said plurality of dices is dynamic random access memory (DRAM).

35. The package method according to claim 31, wherein said plurality of dices with different dimensions.

36. The package method according to claim 35, wherein said plurality of dices with different dimension is selected from a group consisting of:

microprocessor means, memory means, and memory controller means.

37. A dice rearrangement package structure, comprises:

a dice having an active surface and a bottom surface, and a plurality of pads on said active surface;

an encapsulated body encapsulated said dice and exposed said plurality of pads on said active surface, wherein the material of said encapsulated body is B-stage material;

one ends of a plurality of fan-out metal traces electrically connected said plurality of pads;

a protective layer encapsulated said active surface of said dice and said plurality of metal traces and exposed another ends of said plurality of metal traces; and

a plurality of connecting components electrically connected another ends of said plurality of metal traces.

38. The package structure according to claim 37, wherein the reverse side of said dice is disposed a plurality of alignment marks.

39. The package structure according to claim 37, further comprising a substrate is disposed on a reverse side of said encapsulated body.

40. The package structure according to claim 39, wherein the material of said substrate is selected from the group consisting of:

glass, wafer, and metal material.

41. A dice rearrangement package structure, comprising:

a dice having an active surface and a bottom surface, and a plurality of pads is disposed on said active surface;

an encapsulated body encapsulated said dice and exposed said active surface, wherein the material of said encapsulated body is a layer of B-stage material;

a sensitive material encapsulated said active surface of said dice and exposed said plurality of pads;

one ends of a plurality of fan-out metal traces electrically connected said plurality of pads;

a protective layer encapsulated said active surface of said dice and said plurality of metal traces, and exposed another ends of said plurality of metal traces; and

a plurality of connecting components electrically connected another ends of said plurality of metal traces.

42. The package structure according to claim 41, wherein the reverse side of said dice is disposed a plurality of alignment marks.

43. The package structure according to claim 41, further comprising a substrate is disposed on said reverse side of said encapsulated body.

44. The package structure according to claim 43, wherein the material of said substrate is selected from the group consisting of:

glass, wafer, and metal material.

45. A dice rearrangement package structure, comprising:

a plurality of dices, each said plurality of dices having an active surface and a bottom surface, and a plurality of pads disposed on said active surface;

an encapsulated body encapsulated said plurality of pads and exposed said plurality of pads on said active surface of said plurality of dices, wherein the material of said encapsulated body is a layer of B-stage material;

a plurality of fan-out metal traces electrically connected said plurality of pads;

a protective layer encapsulated said active surface of said plurality of dices and exposed another ends of said plurality of metal traces; and

a plurality of connecting components electrically connected another ends of said plurality of metal traces.

46. The package structure according to claim 45, wherein said plurality of dices with dimensions.

47. The package structure according to claim 46, wherein said plurality of dices with said dimensions is light emitting device (LED).

48. The package structure according to claim 46, wherein said plurality of dices with said dimensions is dynamic random access memory (DRAM).

49. The package structure according to claim 45, wherein said plurality of dices with different dimensions.

50. The package structure according to claim 49, wherein said plurality of dices with different dimensions is selected from the group consisting of:

microprocessor means, memory means, and memory controller means.

51. A dice rearrangement package structure, comprising:

a plurality of dices, each said plurality of dices having an active surface and a bottom surface, and a plurality of pads on said active surface;

an encapsulated body encapsulated said plurality of dices and exposed said active surface, wherein the material of encapsulated body is B-stage material;

a sensitive material encapsulated said active surface of said plurality of dice and exposed said plurality of pads;

one ends of a plurality of fan-out metal traces electrically connected said plurality of pads;

a protective layer encapsulated said active surface of said plurality of dices and said plurality of metal traces and exposed another ends of said plurality of metal traces; and

a plurality of connecting components electrically connected another ends of said plurality of metal traces.

52. The package structure according to claim 51, wherein said plurality of dices with same dimensions.

53. The package structure according to claim 52, wherein said plurality of dice with same dimensions is light emitting device (LED).

54. The package structure according to claim 52, wherein said plurality of dices with same dimensions is dynamic random access memory (DRAM).

55. The package structure according to claim 51, wherein said plurality of dices with different dimensions.

56. The package structure according to claim 55, wherein said plurality of dices with different dimensions is selected from the group consisting of:

microprocessor means, memory means, and memory controller means.