Multi-regulator power delivery system for ASIC cores

• US 20090160421A1
• Filed: 12/21/2007
• Published: 06/25/2009
• Est. Priority Date: 12/21/2007
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Chi, Steve X., Nguyen, Daniel P., Lai, Po-Shen
• Granted Patent: US 7,875,996 B2
• Time in Patent Office: Days
• US Class Current: 323/318
• CPC Class Codes: G11C 16/30 Power supply circuits
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 1/0045 Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
• CPC Class Codes: H02M 1/36 Means for starting or stopping converters
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

An electronic product includes an application specific semiconductor chip (ASIC) device which includes in its circuitry both a linear regulator module configured to be coupled to an optional external capacitance and a capless regulator module configured to be coupled to internal capacitance of the electronic product. Control logic of the ASIC device is responsive to a regulator selection signal for selecting one of the linear regulator module and the capless regulator module for use in powering the ASIC device. The control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation.

Claims

1. An electronic apparatus, comprising:

an application specific semiconductor chip (ASIC) device;

a linear regulator module configured to be optionally coupled in operation to an external-to-the ASIC device capacitor via a node;

a capless regulator module coupled to internal capacitance of the electronic product via the node; and

control logic executable by the ASIC device, the control logic responsive to a regulator selection signal for selecting one of the linear regulator module and the capless regulator module for use in powering the ASIC device.

2. The apparatus of claim 1, wherein the linear regulator module includes at least a first and a second linear regulator sub-module, the first linear regulator sub-module configured to provide up to a first level of electrical current and the second linear regulator sub-module configured to provide up to a second level of electrical current.

3. The apparatus of claim 2, wherein the second level of electrical current is greater than the first level of electrical current.

4. The apparatus of claim 1, wherein the regulator selection signal is communicated to the control logic with a regulator selection pin.

5. The apparatus of claim 4, wherein the regulator selection signal is permanently fixed to a particular voltage level.

6. The apparatus of claim 1, wherein the ASIC device is initially configured to use a default selection of one of the linear regulator module and the capless regulator module prior to the completion of initial power-up of at least a portion the ASIC device.

7. The apparatus of claim 6, wherein the linear regulator module includes at least a first and a second linear regulator sub-module, the first linear regulator sub-module configured to provide up to a first level of electrical current and the second linear regulator sub-module configured to provide up to a second level of electrical current.

8. The apparatus of claim 7, wherein the second level of electrical current is greater than the first level of electrical current.

9. The apparatus of claim 1, wherein the regulator selection signal is obtained from a pre-programmed configuration register accessible by the ASIC device.

10. An electronic apparatus, comprising:

an application specific semiconductor chip (ASIC) device;

a linear regulator module configured to be coupled in operation to an optional external capacitor via a node;

a capless regulator module coupled to internal capacitance of the electronic product via the node; and

control logic executable by the ASIC device, the control logic responsive to a stored state of a configuration register accessible by the ASIC device for selecting one of the linear regulator module and the capless regulator module for use in powering the ASIC device.

11. The apparatus of claim 10, wherein the linear regulator module includes at least a first and a second linear regulator sub-module, the first linear regulator sub-module configured to provide up to a first level of electrical current and the second linear regulator sub-module configured to provide up to a second level of electrical current.

12. The apparatus of claim 11, wherein the second level of electrical current is greater than the first level of electrical current.

13. The apparatus of claim 10, wherein the regulator selection signal is communicated to the control logic with a regulator selection pin.

14. The apparatus of claim 13, wherein the regulator selection signal is permanently fixed to a particular voltage level.

15. The apparatus of claim 10, wherein the ASIC device is initially configured to use a predetermined one of the linear regulator module and the capless regulator module prior to the completion of initial power-up of at least a portion the ASIC device.

16. The apparatus of claim 15, wherein the linear regulator module includes at least a first and a second linear regulator sub-module, the first linear regulator sub-module configured to provide up to a first level of electrical current and the second linear regulator sub-module configured to provide up to a second level of electrical current.

17. The apparatus of claim 16, wherein the second level of electrical current is greater than the first level of electrical current.

18. The apparatus of claim 10, wherein the regulator selection signal is obtained from a pre-programmed configuration register accessible by the ASIC device.

19. A memory device, comprising:

a memory array;

an interface circuit configured to communicate with a host device;

a controller coupled to communicate with the memory array and with the interface circuit, the controller implemented on an ASIC device, the controller including;

a linear regulator module configured to be optionally coupled in operation to an external-to-the-ASIC device capacitor via a node;

a capless regulator module coupled to an internal capacitance of the ASIC device via the node; and

control logic executable by the ASIC device, the control logic responsive to a regulator selection signal for selecting one of the linear regulator module and the capless regulator module for use in powering the ASIC device.

20. The memory device of claim 19, wherein the linear regulator module includes at least a first and a second linear regulator sub-module, the first linear regulator sub-module configured to provide up to a first level of electrical current and the second linear regulator sub-module configured to provide up to a second level of electrical current.

21. The apparatus of claim 20, wherein the second level of electrical current is greater than the first level of electrical current.

22. The apparatus of claim 19, wherein the regulator selection signal is communicated to the control logic with a regulator selection pin.

23. The apparatus of claim 22, wherein the regulator selection signal is permanently fixed to a particular voltage level.

24. The apparatus of claim 19, wherein the ASIC device is initially configured to use a default selection of one of the linear regulator module and the capless regulator module prior to the completion of initial power-up of at least a portion the ASIC device.

25. The apparatus of claim 24, wherein the linear regulator module includes at least a first and a second linear regulator sub-module, the first linear regulator sub-module configured to provide up to a first level of electrical current and the second linear regulator sub-module configured to provide up to a second level of electrical current.

26. The apparatus of claim 25, wherein the second level of electrical current is greater than the first level of electrical current.

27. The apparatus of claim 19, wherein the regulator selection signal is obtained from a pre-programmed configuration register accessible by the ASIC device.