Filter Design Methods and Filters Based on Metamaterial Structures

• US 20090160578A1
• Filed: 11/17/2008
• Published: 06/25/2009
• Est. Priority Date: 11/16/2007
• Status: Active Grant

• Current Assignee: Maha Achour
• Original Assignee: Hollinworth Fund L.L.C. (Intellectual Ventures LLC)
• Inventors: Achour, Maha
• Granted Patent: US 8,237,519 B2
• Time in Patent Office: Days
• US Class Current: 333/175
• CPC Class Codes: H01P 1/203 Strip line filters
• CPC Class Codes: H01P 1/213 combining or separating two or more different frequencies H01P1/215 takes precedence
• CPC Class Codes: H01P 3/08 Microstrips; Strip lines
• CPC Class Codes: H03H 7/01 Frequency selective two-port networks

Abstract

Filter design techniques and filters based on metamaterial structures including an extended composite left and right handed (E-CRLH) metamaterial unit cell.

Claims

1. A metamaterial structure based filter apparatus, comprising:

an extended composite left and right handed (E-CRLH) metamaterial unit cell comprising;

a series inductor LR and a series capacitance CL that in combination produce a series resonance ω

_SE,

a shunt inductor LL and a shunt capacitance CR that in combination produce a shunt resonance ω

_SH,

a series inductor LR′ and

a series capacitance CL′

that in combination produce a series resonance ω

_SE′

, and

a shunt inductor LL′ and

a shunt capacitance CR′

that in combination produce a shunt resonance ω

_SH′

,

wherein the series inductor LR, the series capacitance CL, the shunt inductor LL, the shunt capacitance CR, the series inductor LR′

, the series capacitance CL′

, the shunt inductor LL′ and

the shunt capacitance CR′

are (1) connected to form a symmetric cell structure for the E-CRLH unit cell where an input and an output of the E-CRLH unit cell have a common circuit structure, and (2) to have values that render ω

_SE and ω

_SH′

to be substantially equal, and ω

_SH and ω

_SE′

to be substantially equal.

2. The apparatus as in claim 1, comprising one or more additional E-CRLH unit cells coupled to the E-CRLH unit cell.

3. The apparatus as in claim 1, comprising a low-pass filter that is coupled to the E-CRLH unit cell.

4. The apparatus as in claim 3, wherein the low-pass filter comprises a metamaterial structure.

5. The apparatus as in claim 1, comprising a high-pass filter that is coupled to the E-CRLH unit cell.

6. The apparatus as in claim 5, wherein the high-pass filter comprises a metamaterial structure.

7. The apparatus as in claim 1, wherein a ratio of LR/CR and a ratio of LL′

/CL′

are substantially equal.

8. The apparatus as in claim 1, wherein values of LR, CL, LL, CR, LR′

, CL′

, LL′

, CR′

are selected to match an input impendance and an output impedance of the apparatus.

9. The apparatus as in claim 1, wherein the series inductor LR is selected to match an input impedance and an output impedance of the apparatus.

10. The apparatus as in claim 1, wherein the E-CRLH unit cell has a printed circuit structure formed in four separated metallization layers which that are parallel to one another and comprise:

a first metallization layer patterned to comprise a first signal port, a first feed line coupled to the first signal port, a first launch pad coupled to the first feed line, and a first cell patch that is separated from and capacitively coupled to the first launch pad, a second cell patch spaced from the first cell patch and coupled to receive a signal from the first cell patch, a second launch pad separated from and capacitively coupled to the second cell patch, a second feed line coupled to the second launch pad, and a second signal port coupled to the second feed line;

a second metallization layer patterned to comprise a first conductive cell patch positioned underneath the first metallization layer between the first and second cell patches;

a third metallization layer patterned to comprise a second conductive cell underneath the first conductive cell patch in the second metallization layer;

a first conductive via that connects the first conductive cell patch in the second metallization layer and the second conductive cell patch in the third metallization layer;

a fourth metallization layer to provide a ground electrode for the apparatus;

a first cell via that connects the first cell patch on the first metallization layer and the ground electrode in the fourth metallization layer, the first cell via being separate from and without direct contact with the first and second conductive cell patches; and

a second cell via that connects the second cell patch on the first metallization layer and the ground electrode in the fourth metallization layer, the second cell via being separate from and without direct contact with the first and second conductive cell patches.

11. The apparatus as in claim 10, wherein:

the first metallization layer is patterned to comprise a first top ground electrode adjacent to the first launch pad and a second top ground electrode adjacent to the second launch pad;

the second metallization layer is patterned to comprise a first bottom ground electrode underneath the first top ground electrode and a second bottom ground electrode underneath the second top ground electrode,

the first top ground electrode is patterned to support, in combination with the first bottom ground electrode, a first co-planar waveguide (CPW) that is coupled between the first signal port and the first feed line, and

the second top ground electrode is patterned to support, in combination with the second bottom ground electrode, a second co-planar waveguide (CPW) that is coupled between the second signal port and the second feed line.

12. The apparatus as in claim 1, wherein circuit elements in the E-CRLH unit cell comprise discrete circuit elements.

13. The apparatus as in claim 1, wherein the E-CLRH unit cell is structured to behave as a low-pass filter at a low frequency range, a high-pass filter at a high frequency range and an isolation the between an upper edge of the low-pass filter and a lower edge of the high-pass filter is equal to or greater than 25 dB.

14. The apparatus as in claim 13, wherein the low-pass filter is in a frequency band 800-2170 MHz and the high-pass filter has a frequency band 2.3-6.0 GHz.

15. A filter apparatus comprising:

a E-CRLH unit-cell structure formed from a non-linear combination of a Conventional CRLH (C-CRLH) cell and a Dual CRLH (D-CRLH) cell;

a combination of a series inductor LR and a series capacitance CL of the C-CRLH cell producing a series resonance ω

SE;

a combination of a shunt inductor LL and a shunt capacitance CR of the C-CRLH cell producing a shunt resonance ω

SH;

a combination of a series inductor LR′ and

a series capacitance CL′

of the D-CRLH cell producing a series resonance ω

SE′

; and

a combination of a shunt inductor LL′ and

a shunt capacitance CR′

of the D-CRLH cell producing a shunt resonance ω

SH′

, wherein ω

SE and ω

SH′

are substantially equal and ω

SH and ω

SE′

are substantially equal.

16. The filter apparatus of claim 15, wherein LR/CR and LL′

/CL′

are substantially equal.

17. The filter apparatus of claim 15, wherein LR, CL, LL, CR, LR′

, CL′

, LL′

, CR′ and

a combination thereof are adjusted to match an input and an output impedance of the filter.

18. The filter apparatus of claim 15, wherein the series inductor LR is adjusted to match an input and an output impedance of the filter.

19. The filter apparatus of claim 15, wherein the unit-cell structure comprises a plurality of E-CRLH unit-cell structures.

20. The filter apparatus of claim 15, wherein the E-CRLH unit-cell is coupled a low-pass filter.

21. The filter apparatus of claim 15, wherein the E-CRLH unit-cell is coupled a high-pass filter.

22. The filter apparatus of claim 15, wherein the series inductor LR, the series capacitance CL, the shunt inductor LL, the shunt capacitance CR, the series inductor LR′

, the series capacitance CL′

, the shunt inductor LL′ and

the shunt capacitance CR′

of the E-CRLH unit-cell are arranged and connected to form a symmetric cell structure for the E-CRLH cell where an input and an output of the E-CRLH cell have a common circuit structure.

23. A filter apparatus comprising:

a C-CRLH unit-cell structure comprised of a plurality of Conventional CRLH (C-CRLH) cells having a first CRLH (C-CRLH) cell coupled to a second CRLH (C-CRLH) cell;

a combination of a series inductor LR1 and a series capacitance CL1 of the first CRLH (C-CRLH) cell which produces a series resonance ω

SE₁;

a combination of a shunt inductor LL1 and a shunt capacitance CR1 of the first CRLH (C-CRLH) cell which produces a shunt resonance ω

SH₁;

a combination of a series inductor LR2 and a series capacitance CL2 of the second CRLH (C-CRLH) cell which produces a series resonance ω

SE₂; and

a combination of a shunt inductor LL2 and a shunt capacitance CR2 of the second CRLH (C-CRLH) which produces a shunt resonance ω

SH₂, wherein ω

SE₁ and ω

SE₂ are substantially equal, and ω

SH₁ and ω

SH₂ are substantially equal.

24. The filter apparatus of claim 23, wherein LR1, CL1, LL1, CR1, LR2, CL2, LL2, CR2, and a combination thereof are adjusted to match an input and an output impedance of the filter.

25. The filter apparatus of claim 23, wherein LR1 and LR2 parameters are adjusted to match an input and an output impedance of the filter.

26. The filter apparatus of claim 23, wherein the Conventional CRLH (C-CRLH) cell structure is coupled to a low-pass filter.

27. The filter apparatus of claim 23, wherein Conventional CRLH (C-CRLH) cell structure is coupled to a high-pass filter.

28. A fully printed extended composite left and right handed (E-CRLH) metamaterial structure, comprising:

a first metallization layer patterned to comprise a first signal port, a first feed line coupled to the first signal port, a first launch pad coupled to the first feed line, and a first cell patch that is separated from and capacitively coupled to the first launch pad, a second cell patch spaced from the first cell patch and coupled to receive a signal from the first cell patch, a second launch pad separated from and capacitively coupled to the second cell patch, a second feed line coupled to the second launch pad, and a second signal port coupled to the second feed line;

a second metallization layer patterned to comprise a first conductive cell patch positioned underneath the first metallization layer between the first and second cell patches;

a third metallization layer patterned to comprise a second conductive cell underneath the first conductive cell patch in the second metallization layer;

a first conductive via that connects the first conductive cell patch in the second metallization layer and the second conductive cell patch in the third metallization layer;

a fourth metallization layer to provide a ground electrode for the apparatus;

a first cell via that connects the first cell patch on the first metallization layer and the ground electrode in the fourth metallization layer, the first cell via being separate from and without direct contact with the first and second conductive cell patches; and

a second cell via that connects the second cell patch on the first metallization layer and the ground electrode in the fourth metallization layer, the second cell via being separate from and without direct contact with the first and second conductive cell patches.

29. A printed conventional composite left and right handed (C-CRLH) structure, comprising:

a top layer having a plurality of CPW feed lines, a top ground, and a plurality of ports;

a first dielectric substrate having a first surface on a first side and a second surface on a second side opposing the first side, wherein the first surface of the first substrate is attached to the top layer;

a second layer having a top metal-insulator-metal (MIM) layer, wherein the second layer is attached to the second surface of the first substrate, wherein a first set of cell conductive via connectors are formed in the first substrate creating a conductive path from the top layer to the second layer;

a second dielectric substrate having a first surface on a first side and a second surface on a second side opposing the first side, wherein the first surface of the second substrate is attached to the second layer;

a third layer having a main structure, wherein the third layer is attached to the second surface of the second substrate, wherein a second set of cell conductive via connectors are formed in the second substrate creating a conductive path from the second layer to the third layer;

a third dielectric substrate having a first surface on a first side and a second surface on a second side opposing the first side, wherein the first surface of the third substrate is attached to the third layer;

a fourth layer having a bottom MIM layer, wherein the fourth layer is attached to the second surface of the third substrate;

a fourth dielectric substrate having a first surface on a first side and a second surface on a second side opposing the first side, wherein the first surface of the fourth substrate is attached to the fourth layer; and

a fifth layer having a bottom ground, wherein the fifth layer is attached to the second surface of the fourth substrate, wherein the top layer, the top, second, third, fourth, and fifth layer, the first, second, third, fourth, and fifth substrate, the cell conductive via connectors, top MIM layer, main structure, and bottom MIM layer are structured to form a printed C-CRLH structure.

30. The structure as in claim 29, wherein the third layer is patterned to comprise a first cell patch, a first launch pad separated from and capacitively coupled to the first cell patch, a first feed line coupled to the first cell patch, a second cell patch, a second launch pad separated from and capacitively coupled to the first cell patch.

31. The structure as in claim 30, wherein each of the first cell patch and the second cell patch comprises a first cell patch part, a separate cell patch part and a conductor line connecting the first and the second cell patch parts.

32. A diplexer apparatus comprising:

a main input/output port capable of transmitting and receiving a plurality of signals having a low-band frequency and a high-band frequency;

a low-band input/output port capable of transmitting and receiving a first signal operating at the low-band frequency;

a band-pass low-band filter connecting the main input/output port to the low-band input/output port having a low insertion loss and a sharp upper band edge;

a high-band input/output port capable of transmitting and receiving a second signal operating at the high-band frequency; and

a band-pass high-band filter connecting the main input/output port to the high-band port having a low insertion and a sharp lower band edge,

wherein an isolation defined between the upper edge of the low-band filter and the lower edge of the high-band filter defines is low.

33. The diplexer apparatus of claim 32, wherein the isolation between the upper edge of the low-band filter and the lower edge of the high-band filter defines is below −

25 dB.

34. A method for designing a filter circuit, comprising:

identifying target filter performance parameters of a filter circuit, including an impedance, a frequency band, and a filter bandwidth of the filter circuit;

deriving a plurality of initial circuit parameters based on the identified target filter performance parameters and impedance matching conditions of the filter circuit;

evaluating a beta curve, return loss, transmission bands, and impedances of the filter circuit; and

creating a spreadsheet to iteratively optimize and verify the circuit parameters of the filter circuit to search for a final set of circuit parameters that meet the identifying target filter performance parameters.

35. The method as in claim 34, wherein the filter circuit comprises an Extended Composite Right Left Handed (E-CRLH) cell.

36. The method as in claim 34, wherein the filter design comprises a Conventional Composite Right Left Handed (C-CRLH) cell.

37. The method as in claim 34, wherein the filter circuit comprises a plurality of discrete circuit elements.

38. The method as in claim 34, wherein the filter circuit comprises a plurality of fully printed circuit elements.

39. The method as in claim 34, wherein the filter circuit comprises a combination of discrete circuit elements and printed circuit elements.

40. The method as in claim 34, wherein the filter circuit is a broadband filter.

41. The method as in claim 34, wherein the filter circuit is a narrow-band filter.

42. The method as in claim 34, wherein the filter circuit is a multi-band filter.