SOLID-STATE IMAGING DEVICE, DRIVING METHOD THEREOF, AND CAMERA

• US 20090160993A1
• Filed: 12/08/2008
• Published: 06/25/2009
• Est. Priority Date: 12/21/2007
• Status: Active Grant

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: MATSUMOTO, Hiroshi, FUJITA, Takeshi, KOHNO, Akiyoshi, KATO, Yoshiaki
• Granted Patent: US 8,085,331 B2
• Time in Patent Office: Days
• US Class Current: 348/312
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/71 Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
• CPC Class Codes: H04N 25/745 Circuitry for generating timing or clock signals

Abstract

An objective of the present invention is to provide the solid-state imaging device and the driving method thereof which can control: a poor picture quality, such as blooming, to maximize a dynamic range of the photodiode; and a poor picture quality resulted from an incomplete read-out operation. A solid-state imaging device in the present invention includes: a solid-state imaging element; and a driving pulse controlling unit applying a driving pulse to each of read-out gates of a column CCD. The driving pulse controlling unit transfers in a column direction signal charge within a charge transfer region of the column CCD by applying a column transfer clock having a LOW level voltage and a MIDDLE level voltage, and the LOW level voltage and the MIDDLE level voltage are minus voltages.

Claims

1. A solid-state imaging device comprising:

a solid-state imaging element including

a semiconductor substrate of a first conductivity type on which a second conductivity type well region is formed,

photodiodes arranged two dimensionally on said semiconductor substrate, each of said photodiodes formed in the well region, and a column CCD having a read-out gate, a non read-out gate, and a charge transfer region, the read-out gate reading out signal charge of said photodiode and transferring the signal charge in a column direction, the non read-out gate transferring signal charge in a column direction, and the charge transfer region, which is formed in the well region, for transferring the read-out signal charge; and

a driving pulse controlling unit configured to control said solid-state imaging element by applying a first driving pulse to each of read-out gates,

wherein said driving pulse controlling unit transfers in a column direction signal charge within the charge transfer region by applying the first driving pulse to each of the read-out gates, the first driving pulse for alternating a first voltage at a MIDDLE level and a second voltage at a LOW level, and

the first and the second voltages are minus voltages with respect to a potential of the well region.

2. The solid-state imaging device according to claim 1,

wherein said driving pulse controlling unit includes:

a driving pulse generating unit configured to generate a second driving pulse alternating a third voltage at the LOW level and a fourth voltage at the MIDDLE level; and

a pulse shifting unit configured to shift the second driving pulse by a predetermined voltage to generate the first driving pulse.

3. The solid-state imaging device according to claim 2,

wherein said driving pulse controlling unit transfers in a column direction the signal charge within the charge transfer region by applying the second driving pulse to each of non read-out gates.

4. The solid-state imaging device according to claim 2,

wherein said solid-state imaging element includes a diode, and

said pulse shifting unit includes a clamp circuit causing the diode to shift the second driving pulse by a predetermined voltage.

5. The solid-state imaging device according to claim 1,

wherein said driving pulse controlling unit generates the first driving pulse upon receiving the first and the second voltages from a power source.

6. The solid-state imaging device according to claim 1,

wherein said photodiode includes a first semiconductor region of a second conductivity type formed on a surface of the well region, and a second semiconductor region of a first conductivity type formed under the first semiconductor region,

the first and the second semiconductor regions are located beside the charge transfer region, and

a side portion of the first semiconductor region, facing to the charge transfer region recedes in a direction away from the charge transfer region with respect to a side portion of the second semiconductor region, facing to the charge transfer region.

17. A camera comprising a solid-state imaging device according to claim 1.

7. A solid-state imaging device comprising:

a solid-state imaging element including

a semiconductor substrate of a first conductivity type on which a second conductivity type well region is formed,

photodiodes arranged two dimensionally on said semiconductor substrate, each of said photodiodes formed in the well region, and

a column CCD having a read-out gate and a non read-out gate provided on each of said photodiodes, and a charge transfer region, the read-out gate reading out signal charge of said photodiode, the non read-out gate transferring the signal charge in a column direction, and the charge transfer region, which is formed in the well region, for transferring the read-out signal charge; and

a driving pulse controlling unit configured to control said solid-state imaging element by applying a driving pulse to each of read-out gates and each of non read-out gates,

wherein, in a column transfer period in which transfer of the signal charge in a column direction is performed, said driving pulse controlling unit transfers in a column direction signal charge within the charge transfer region by applying the driving pulse to each of the read-out gates and the non read-out gates, the driving pulse alternating a fifth voltage at a LOW level and a sixth voltage at a MIDDLE level,

said driving pulse controlling unit applies a seventh voltage at the MIDDLE level to at least either each of the read-out gates or the non read-out gates in a non column transfer period in which the transfer of the signal charge is suspended, the seventh voltage is a minus voltage with respect to a potential of the well region,

said photodiode includes a first semiconductor region of a second conductivity type formed on a surface of the well region, and a second semiconductor region of a first conductivity type formed under the first semiconductor region,

the first and the second semiconductor regions are located beside the charge transfer region, and

a side portion, of the first semiconductor region, facing to the charge transfer region recedes in a direction away from the charge transfer region with respect to a side portion, of the second semiconductor region, facing to the charge transfer region.

8. The solid-state imaging device according to claim 7,

wherein said driving pulse controlling unit includes:

a driving voltage selecting unit configured to forward the sixth voltage in the column transfer period and the seventh voltage in the non column transfer period; and

a driving pulse generating unit configured to generate the driving pulse upon receiving the sixth or the seventh voltages forwarded from said driving voltage selecting unit.

9. The solid-state imaging device according to claim 8,

wherein said driving voltage selecting unit switches between the sixth and the seventh voltages with respect to a signal synchronizing a row scanning period, and forwards the switched voltage.

10. The solid-state imaging device according to claim 8,

wherein said driving voltage selecting unit switches between the sixth and the seventh voltages and forwards the switched voltage with respect to a signal based on a result of a logical operation of the driving pulse applied to read-out gates and non read-out gates.

11. The solid-state imaging device according to claim 8,

wherein said driving pulse controlling unit further includes a negative potential generating unit configured to generate the seventh voltage out of power supply.

18. A camera comprising a solid state imaging device according to claim 7.

12. A driving method for a solid-state imaging device including:

a solid-solid-state imaging element having a semiconductor substrate of a first conductivity type on which a second conductivity type well region is formed, photodiodes arranged two dimensionally on the semiconductor substrate, each of the photodiode formed in the well region, and a column CCD having a read-out gate, a non read-out gate, and a charge transfer region, the read-out gate reading out signal charge of the photodiode and transferring the signal charge in a column direction, the non read-out gate transferring signal charge in a column direction, and the charge transfer region, which is formed in the well region, for transferring the read-out signal charge; and

a driving pulse controlling unit controlling the solid-state imaging element by applying a first driving pulse to each of read-out gates, said driving method comprising

transferring in a column direction signal charge within the charge transfer region by applying the first driving pulse to each of the read-out gates, the first driving pulse alternating a first voltage at a MIDDLE level and a second voltage at a LOW level,

wherein both of the first and the second voltages are minus voltages with respect to a potential of the well region.

13. The driving method for the solid-state imaging device according to claim 12,

wherein the first driving pulse is generated by shifting a second driving pulse by a predetermined voltage, the second driving pulse alternating a third voltage at the LOW level and a fourth voltage at the MIDDLE level.

14. The driving method for the solid-state imaging device according to claim 13,

wherein the second driving pulse is applied to each of non read-out gates in said transferring the signal charge in a column direction.

15. A driving method for a solid-state imaging device including:

a solid-state imaging element having a semiconductor substrate of a first conductivity type on which a second conductivity type well region is formed, photodiodes arranged two dimensionally on the semiconductor substrate, each of the photodiodes formed in the well region, and a column CCD having a read-out gate and a non read-out gate provided on each of the photodiodes, and a charge transfer region, the read-out gate reading out signal charge of the photodiode, the non read-out gate transferring signal charge in a column direction, and the charge transfer region, which is formed in the well region, for transferring the read-out signal charge; and

a driving pulse controlling unit controlling the solid-state imaging element by applying a driving pulse to each of read-out gates and each of non read-out gates, said driving method comprising;

transferring in a column direction signal charge within the charge transfer region by applying the driving pulse to each of the read-out gates and the non read-out gates, said transferring performed in a column transfer period in which the transfer of the signal charge is performed in a column direction, and the driving pulse alternating a fifth voltage at a LOW level and a sixth voltage at a MIDDLE level; and

applying a seventh voltage at the MIDDLE level to at least either each of the read-out gates or each of the non read-out gates in a non column transfer period in which the transfer of the signal charge in a column direction is suspended,

wherein the seventh voltage is a minus voltage with respect to a potential of the well region.

16. The driving method for the solid-state imaging device according to claim 15, comprising

generating the driving pulse upon receiving the sixth and the seventh voltages forwarded from a driving voltage selecting unit forwarding the sixth voltage in the column transfer period and the is seventh voltage in the non column transfer period.