Microprocessor Memory Management

• US 20090164838A1
• Filed: 11/30/2006
• Published: 06/25/2009
• Est. Priority Date: 11/30/2005
• Status: Active Grant

• Current Assignee: Kelsey-Hayes Co. (Zeppelin - Stiftung der Stadt Friedrichshafen)
• Original Assignee: Kelsey-Hayes Co. (Zeppelin - Stiftung der Stadt Friedrichshafen)
• Inventors: Haller, Mark
• Granted Patent: US 8,117,490 B2
• Time in Patent Office: Days
• US Class Current: 714/6
• CPC Class Codes: G06F 11/1446 Point-in-time backing up or restoration of persistent data
• CPC Class Codes: G06F 11/1666 where the redundant component is memory or memory area
• CPC Class Codes: G11C 17/14 in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
• CPC Class Codes: G11C 2029/0401 in embedded memories
• CPC Class Codes: G11C 2029/0407 on power on
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 29/26 Accessing multiple arrays G11C29/24 takes precedence
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: G11C 29/74 using duplex memories, i.e. using dual copies
• CPC Class Codes: G11C 29/832 with disconnection of faulty elements
• CPC Class Codes: G11C 29/88 with partially good memories

Abstract

A memory for an electronic brake control system is divided into portions that are classified as critical and non-critical. Each portion is periodically tested for faults. Upon detection of a fault, the memory is reconfigured with any operations of the brake system associated with a critical memory portion permanently disabled and any operations of the brake system associated with a non-critical memory portion temporarily disabled.

Claims

1. A method for reconfiguring a memory storage device comprising the steps of:

(a) providing a memory storage device that is divided into separate portions;

(b) testing each portion of the memory storage device for a fault; and

(c) upon detecting a fault in step (b), disabling the portion of the memory storage device associated with the fault.

2. The method according to claim 1 wherein the memory storage device is included in an electronic control system.

3. The method according to claim 2 wherein step (c) also includes disabling the operation of the portion of the control system associated with the disabled portion of the memory storage device.

4. The method according to claim 3 wherein the portions of the memory storage device provided in step (a) are each assigned a classification as one of critical and non-critical and further wherein disablement in step (c) is permanent for any disabled portion of the memory storage device that is classified as critical.

5. The method according to claim 3 wherein the portions of the memory storage device provided in step (a) are each assigned a classification as one of critical and non-critical and further wherein disablement in step (c) is temporary for any disabled portion of the memory storage device that is classified as non-critical.

6. The method according to claim 5 wherein the temporary disablement may be subsequently reset upon clearance of the associated fault detected in step (b).

7. The method according to claim 6 wherein the portion of the control system associated with the disabled portion of the memory storage device also is enabled upon clearance of the associated fault detected in step (b).

8. A method for reconfiguring a memory storage device comprising the steps of:

(a) providing a memory storage device that is divided into separate portions with each portion of the memory storage device assigned a classification as one of critical and non-critical with a back-up memory portion provided for each critical portion of the memory storage device;

(b) testing each critical portion of the memory storage device for a fault; and

(c) upon detecting a fault in step (b) for a critical portion of the memory storage device, replacing the function contained within the faulted portion of the memory storage device associated with information stored in the corresponding back-up memory portion.

9. The method according to claim 8 further including generation of an error signal upon detection of a fault in a critical portion of the memory storage device in step (b).

10. The method according to claim 8 wherein step (b) also includes testing each non-critical portion of the memory storage device for a fault and further wherein step (c) also includes temporarily disabling any non-critical portion of the memory storage device for which a fault is detected.

11. The method according to claim 9 wherein step (c) also includes disabling the operation of the portion of a control system associated with the disabled non-critical portion of the memory storage device.

12. The method according to claim 11 wherein the temporary disablement of the non-critical memory portion of the memory storage device in step (c) may be subsequently reset upon clearance of the associated fault detected in step (b).

13. The method according to claim 12 wherein the memory storage device is included in an electronic brake control system.

14. A method for reconfiguring a memory storage device connected to a microprocessor, the method comprising the steps of:

(a) providing a microprocessor that is connected to a ROM, the ROM being divided into separate portions with each portion of the ROM assigned a classification as one of critical and non-critical, the microprocessor also connected to a non-volatile memory for storing static data and a flash memory;

(b) booting up the microprocessor;

(c) testing the non-volatile memory and, upon determining that the data in the non-volatile memory is not corrupted, copying the data in the non-volatile memory into the flash memory;

(d) testing each ROM portion of the ROM for a fault;

(e) taking a corrective action upon detecting a fault in step (d); and

(f) testing periodically the non-volatile memory and, upon determining that the data in the non-volatile memory is corrupted, replacing the corrupted data with the uncorrupted data stored in the flash memory during step (c).

15. The method according to claim 14 further including in step (a) providing a back-up memory portion provided for each critical portion of the ROM and further wherein the corrective action is step (c) includes replacing the function contained within a faulted critical portion of the ROM with information stored in the corresponding back-up memory portion.

16. A method for reconfiguring a memory storage device connected to a microprocessor, the method comprising the steps of:

(a) providing a microprocessor that is connected to a ROM, the ROM being divided into separate portions, the microprocessor also connected to a non-volatile memory for storing static data and a flash memory having a portion corresponding to each portion of the ROM;

(b) booting up the microprocessor;

(c) testing each portion of the ROM and, upon determining that the data in tested portion of the ROM is not corrupted, copying the data in the tested portion of the ROM into the portion of the flash memory corresponding to the tested portion of the ROM; and

,

(d) testing periodically each portion of the ROM and, upon determining that the data in the tested portion of the ROM is corrupted, replacing the corrupted data with the uncorrupted data stored in the corresponding portion of the flash memory during step (c).

17. A method for reconfiguring a memory storage device connected to a microprocessor, the method comprising the steps of:

(a) providing a microprocessor that is connected to a ROM, the ROM being divided into separate portions, the microprocessor also connected to a non-volatile memory for storing static data and a flash memory having a portion corresponding to each portion of the ROM and a portion corresponding to the non-volatile memory;

(b) booting up the microprocessor;

(c) testing the non-volatile memory and, upon determining that the data in the non-volatile memory is not corrupted, copying the data in the non-volatile memory into the portion of the flash memory corresponding to the non-volatile memory;

(d) testing each portion of the ROM and, upon determining that the data in tested portion of the ROM is not corrupted, copying the data in the tested portion of the ROM into the portion of the flash memory corresponding to the tested portion of the ROM;

(e) testing periodically the non-volatile memory and, upon determining that the data in the tested non-volatile memory is corrupted, replacing the corrupted data with the uncorrupted data stored in the corresponding portion of the flash memory during step (c); and

(f) testing periodically each portion of the ROM and, upon determining that the data in the tested portion of the ROM is corrupted, replacing the corrupted data with the uncorrupted data stored in the corresponding portion of the flash memory during step (d).

18. A method for reconfiguring a memory storage device connected to a microprocessor, the method comprising the steps of:

(a) providing a microprocessor that is connected to a ROM, the ROM being divided into separate portions with each portion assigned a classification as one of critical and non-critical, the microprocessor also connected to a non-volatile memory for storing static data and a flash memory having a portion corresponding to at least one portion of the ROM and a portion corresponding to the non-volatile memory;

(b) booting up the microprocessor;

(c) testing the non-volatile memory and, upon determining that the data in the non-volatile memory is not corrupted, copying the data in the non-volatile memory into the flash memory;

(d) testing the at least one portion of the ROM and, upon determining that the data in tested portion of the ROM is not corrupted, copying the data in the tested portion of the ROM into the portion of the flash memory corresponding to the tested portion of the ROM; and

(e) testing periodically the non-volatile memory and, upon determining that the data in the tested memory is corrupted, replacing the corrupted data with the uncorrupted data stored in the corresponding portion of the flash memory during step (c);

(f) testing periodically the at least one portion of the ROM and, upon determining that the data in the tested ROM portion is corrupted, replacing the corrupted data with the uncorrupted data stored in the corresponding portion of the flash memory during step (d);

(g) testing periodically the portions of the ROM that do not have data copied into the flash memory for faults; and

(h) taking a corrective action upon detecting a fault in step (g).

19. A method for reconfiguring a memory storage device connected to a microprocessor, the method comprising the steps of:

(a) providing a microprocessor that is connected to a ROM, the ROM being divided into separate portions with each portion assigned a classification as one of critical and non-critical, the microprocessor also connected to a flash memory having a portion corresponding to at least one portion of the ROM and a portion corresponding to the non-volatile memory;

(b) booting up the microprocessor;

(c) testing the at least one portion of the ROM and, upon determining that the data in tested portion of the ROM is not corrupted, copying the data in the tested portion of the ROM into the portion of the flash memory corresponding to the tested portion of the ROM; and

(d) testing periodically the non-volatile memory and the at least one portion of the ROM and, upon determining that the data in the tested portion of the ROM is corrupted, replacing the corrupted data with the uncorrupted data stored in the corresponding portion of the flash memory during step (c).

(e) testing periodically the portions of the ROM that do not have data copied into the flash memory for faults; and

(f) taking a corrective action upon detecting a fault in step (e)