Semiconductor Memory Devices that are Configured to Analyze Read Failures and Related Methods of Operating Such Devices
First Claim
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1. A semiconductor memory device comprising:
- a nonvolatile memory that includes a plurality of memory cells; and
a memory controller that is configured to control at least some of the operations of the nonvolatile memory, the memory controller including an error correction unit;
wherein the memory controller is configured to determine whether a read failure that occurs during a read operation of a first of the plurality of memory cells is due to charge leakage based at least in part on an output of the error correction unit.
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Abstract
Semiconductor memory devices are provided that include a nonvolatile memory that has a plurality of memory cells and a memory controller that is configured to control at least some of the operations of the nonvolatile memory. The memory controller include an error correction unit. Moreover, the memory controller is configured to determine whether a read failure that occurs during a read operation of a first of the plurality of memory cells is due to charge leakage based at least in part on an output of the error correction unit. Related methods are also disclosed.
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Citations
20 Claims
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1. A semiconductor memory device comprising:
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a nonvolatile memory that includes a plurality of memory cells; and a memory controller that is configured to control at least some of the operations of the nonvolatile memory, the memory controller including an error correction unit; wherein the memory controller is configured to determine whether a read failure that occurs during a read operation of a first of the plurality of memory cells is due to charge leakage based at least in part on an output of the error correction unit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for analyzing a read failure of a semiconductor memory device that includes a nonvolatile memory and a memory controller, the method comprising:
analyzing an error correction code associated with a first data read operation from the nonvolatile memory to determine whether the read failure is due to charge leakage. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A method of repairing a memory cell of a nonvolatile memory that experiences a read failure during a first read operation, the method comprising:
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using an output of an error correction unit to classify the cause of the read failure, and selecting a method for repairing the memory cell based on the classification of the cause of the read failure. - View Dependent Claims (17, 18, 19, 20)
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Specification