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Semiconductor Memory Devices that are Configured to Analyze Read Failures and Related Methods of Operating Such Devices

  • US 20090164871A1
  • Filed: 11/21/2008
  • Published: 06/25/2009
  • Est. Priority Date: 12/20/2007
  • Status: Active Grant
First Claim
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1. A semiconductor memory device comprising:

  • a nonvolatile memory that includes a plurality of memory cells; and

    a memory controller that is configured to control at least some of the operations of the nonvolatile memory, the memory controller including an error correction unit;

    wherein the memory controller is configured to determine whether a read failure that occurs during a read operation of a first of the plurality of memory cells is due to charge leakage based at least in part on an output of the error correction unit.

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